TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
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SPRS358F–APRIL 2007–REVISED AUGUST 2008
Table 8-3. EDMA3 Registers (continued)
HEX ADDRESS
ACRONYM
CERH
EER
REGISTER NAME
02A0 2E1C
02A0 2E20
Chained Event Register Hig
Event Enable Register
02A0 2E24
EERH
EECR
EECRH
EESR
EESRH
SER
Event Enable Register High
Event Enable Clear Register
Event Enable Clear Register High
Event Enable Set Register
Event Enable Set Register High
Secondary Event Register
02A0 2E28
02A0 2E2C
02A0 2E30
02A0 2E34
02A0 2E38
02A0 2E3C
02A0 2E40
SERH
SECR
SECRH
-
Secondary Event Register High
Secondary Event Clear Register
02A0 2E44
Secondary Event Clear Register High
Reserved
02A0 2E48 - 02A0 2E4C
02A0 2E50
IER
Interrupt Enable Register
02A0 2E54
IERH
IECR
IECRH
IESR
IESRH
IPR
Interrupt Enable Register High
Interrupt Enable Clear Register
Interrupt Enable Clear Register High
Interrupt Enable Set Register
Interrupt Enable Set Register High
Interrupt Pending Register
Interrupt Pending Register High
Interrupt Clear Register
02A0 2E58
02A0 2E5C
02A0 2E60
02A0 2E64
02A0 2E68
02A0 2E6C
02A0 2E70
IPRH
ICR
02A0 2E74
ICRH
IEVAL
-
Interrupt Clear Register High
Interrupt Evaluate Register
Reserved
02A0 2E78
02A0 2E7C
02A0 2E80
QER
QDMA Event Register
02A0 2E84
QEER
QEECR
QEESR
QSER
QSECR
-
QDMA Event Enable Register
QDMA Event Enable Clear Register
QDMA Event Enable Set Register
QDMA Secondary Event Register
QDMA Secondary Event Clear Register
Reserved
02A0 2E88
02A0 2E8C
02A0 2E90
02A0 2E94
02A0 2E98 - 02A0 2FFF
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Peripheral Information and Electrical Specifications
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