TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
www.ti.com
SPRS358F–APRIL 2007–REVISED AUGUST 2008
Table 8-3. EDMA3 Registers (continued)
HEX ADDRESS
ACRONYM
-
REGISTER NAME
02A0 287C
02A0 2880
Reserved
QER
QDMA Event Register
QDMA Event Enable Register
02A0 2884
QEER
QEECR
QEESR
QSER
QSECR
-
02A0 2888
QDMA Event Enable Clear Register
QDMA Event Enable Set Register
QDMA Secondary Event Register
QDMA Secondary Event Clear Register
Reserved
02A0 288C
02A0 2890
02A0 2894
02A0 2898 - 02A0 29FF
Shadow Region 5 Channel Registers
Event Register
02A0 2A00
02A0 2A04
02A0 2A08
02A0 2A0C
02A0 2A10
02A0 2A14
02A0 2A18
02A0 2A1C
02A0 2A20
02A0 2A24
02A0 2A28
02A0 2A2C
02A0 2A30
02A0 2A34
02A0 2A38
02A0 2A3C
02A0 2A40
02A0 2A44
02A0 2A48 - 02A0 2A4C
02A0 2A50
02A0 2A54
02A0 2A58
02A0 2A5C
02A0 2A60
02A0 2A64
02A0 2A68
02A0 2A6C
02A0 2A70
02A0 2A74
02A0 2A78
02A0 2A7C
02A0 2A80
02A0 2A84
02A0 2A88
02A0 2A8C
02A0 2A90
02A0 2A94
02A0 2A98 - 02A0 2BFF
ER
ERH
Event Register High
ECR
Event Clear Register
ECRH
ESR
Event Clear Register High
Event Set Register
ESRH
CER
Event Set Register High
Chained Event Register
CERH
EER
Chained Event Register Hig
Event Enable Register
EERH
EECR
EECRH
EESR
EESRH
SER
Event Enable Register High
Event Enable Clear Register
Event Enable Clear Register High
Event Enable Set Register
Event Enable Set Register High
Secondary Event Register
Secondary Event Register High
Secondary Event Clear Register
Secondary Event Clear Register High
Reserved
SERH
SECR
SECRH
-
IER
Interrupt Enable Register
IERH
IECR
IECRH
IESR
IESRH
IPR
Interrupt Enable Register High
Interrupt Enable Clear Register
Interrupt Enable Clear Register High
Interrupt Enable Set Register
Interrupt Enable Set Register High
Interrupt Pending Register
Interrupt Pending Register High
Interrupt Clear Register
IPRH
ICR
ICRH
IEVAL
-
Interrupt Clear Register High
Interrupt Evaluate Register
Reserved
QER
QDMA Event Register
QEER
QEECR
QEESR
QSER
QSECR
-
QDMA Event Enable Register
QDMA Event Enable Clear Register
QDMA Event Enable Set Register
QDMA Secondary Event Register
QDMA Secondary Event Clear Register
Reserved
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Peripheral Information and Electrical Specifications
91