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TMS320VC5416ZGU160 参数 Datasheet PDF下载

TMS320VC5416ZGU160图片预览
型号: TMS320VC5416ZGU160
PDF下载: 下载PDF文件 查看货源
内容描述: TMS320VC5416定点数字信号处理器 [TMS320VC5416 Fixed-Point Digital Signal Processor]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置时钟
文件页数/大小: 98 页 / 855 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320VC5416  
Fixed-Point Digital Signal Processor  
www.ti.com  
SPRS095OMARCH 1999REVISED JANUARY 2005  
3.1.2 Program Memory  
Software can configure their memory cells to reside inside or outside of the program address map. When  
the cells are mapped into program space, the device automatically accesses them when their addresses  
are within bounds. When the program-address generation (PAGEN) logic generates an address outside its  
bounds, the device automatically generates an external access. The advantages of operating from on-chip  
memory are as follows:  
Higher performance because no wait states are required  
Lower cost than external memory  
Lower power than external memory  
The advantage of operating from off-chip memory is the ability to access a larger address space.  
3.1.3 Extended Program Memory  
The device uses a paged extended memory scheme in program space to allow access of up to 8192K of  
program memory. In order to implement this scheme, the device includes several features which are also  
present on C548/549/5410:  
Twenty-three address lines, instead of sixteen  
An extra memory-mapped register, the XPC  
Six extra instructions for addressing extended program space  
Program memory in the device is organized into 128 pages that are each 64K in length.  
The value of the XPC register defines the page selection. This register is memory-mapped into data space  
to address 001Eh. At a hardware reset, the XPC is initialized to 0.  
3.2 On-Chip ROM With Bootloader  
The device features a 16K-word × 16-bit on-chip maskable ROM that can only be mapped into program  
memory space.  
Customers can arrange to have the ROM of the device programmed with contents unique to any particular  
application.  
A bootloader is available in the standard on-chip ROM. This bootloader can be used to automatically  
transfer user code from an external source to anywhere in the program memory at power up. If MP/MC of  
the device is sampled low during a hardware reset, execution begins at location FF80h of the on-chip  
ROM. This location contains a branch instruction to the start of the bootloader program.  
The standard devices provide different ways to download the code to accommodate various system  
requirements:  
Parallel from 8-bit or 16-bit-wide EPROM  
Parallel from I/O space, 8-bit or 16-bit mode  
Serial boot from serial ports, 8-bit or 16-bit mode  
Host-port interface boot  
Warm boot  
18  
Functional Overview