ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢄꢈꢈ ꢉ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄ ꢈꢈ ꢊ
ꢋ ꢌ ꢍꢎꢏ ꢐꢑ ꢒꢌ ꢓ ꢀ ꢏ ꢌ ꢔꢌ ꢀꢕꢖ ꢂ ꢌ ꢔꢓ ꢕꢖ ꢑ ꢗꢒ ꢆꢎꢂ ꢂꢒ ꢗꢂ
SPRS073L − AUGUST 1998 − REVISED JUNE 2005
EXTERNAL INTERRUPT TIMING
†
timing requirements for external interrupts (see Figure 32)
−150
−167
NO.
UNIT
MIN
MAX
1
2
t
t
Width of the interrupt pulse low
Width of the interrupt pulse high
2P
2P
ns
ns
w(ILOW)
w(IHIGH)
†
P = 1/CPU clock frequency in ns. For example, when running parts at 167 MHz, use P = 6 ns.
2
1
EXT_INT, NMI
Figure 32. External/NMI Interrupt Timing
64
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