Electrical Specifications
NOTE:
HALT and STANDBY modes cannot be used when the PLL is disabled.
6.5
Current Consumption by Power-Supply Pins Over Recommended Operating Conditions
During Low-Power Modes at 150-MHz SYSCLKOUT (TMS320C281x)
†
I
I
I
DDA
DD
DDIO
MODE
TEST CONDITIONS
‡
MAX
‡
MAX
‡
MAX
TYP
TYP
TYP
All peripheral clocks are enabled. All PWM pins are toggled
at 100 kHz.
Data is continuously transmitted out of the SCIA, SCIB, and
CAN ports. The hardware multiplier is exercised.
Code is running out of ROM with 5 wait-states.
Operational
210 mA 260 mA
140 mA 155 mA
20 mA
30mA
40 mA
50 mA
−
−
XCLKOUT is turned off
All peripheral clocks are on, except ADC
IDLE
20 mA
1 mA
30 mA
3 mA
5 µA
5 µA
10 µA
10 µA
−
−
Peripheral clocks are turned off
Pins without an internal PU/PD are tied high/low
STANDBY
5 mA
10mA
−
−
−
Peripheral clocks are turned off
Pins without an internal PU/PD are tied high/low
Input clock is disabled
HALT
70 µA
5 µA
10 µA
1 µA
†
I
includes current into V
, V
, V
, AV
DDREFBG
, and V
DDAIO
pins.
DDA
DDA1 DDA2 DD1
93
April 2001 − Revised December 2004
SPRS174L