欢迎访问ic37.com |
会员登录 免费注册
发布采购

TMS320F2812PGFQ 参数 Datasheet PDF下载

TMS320F2812PGFQ图片预览
型号: TMS320F2812PGFQ
PDF下载: 下载PDF文件 查看货源
内容描述: 数字信号处理器 [Digital Signal Processors]
分类和应用: 微控制器和处理器外围集成电路数字信号处理器装置PC可编程只读存储器时钟
文件页数/大小: 162 页 / 1979 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TMS320F2812PGFQ的Datasheet PDF文件第89页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第90页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第91页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第92页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第94页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第95页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第96页浏览型号TMS320F2812PGFQ的Datasheet PDF文件第97页  
Electrical Specifications  
NOTE:  
HALT and STANDBY modes cannot be used when the PLL is disabled.  
6.5  
Current Consumption by Power-Supply Pins Over Recommended Operating Conditions  
During Low-Power Modes at 150-MHz SYSCLKOUT (TMS320C281x)  
I
I
I
DDA  
DD  
DDIO  
MODE  
TEST CONDITIONS  
MAX  
MAX  
MAX  
TYP  
TYP  
TYP  
All peripheral clocks are enabled. All PWM pins are toggled  
at 100 kHz.  
Data is continuously transmitted out of the SCIA, SCIB, and  
CAN ports. The hardware multiplier is exercised.  
Code is running out of ROM with 5 wait-states.  
Operational  
210 mA 260 mA  
140 mA 155 mA  
20 mA  
30mA  
40 mA  
50 mA  
XCLKOUT is turned off  
All peripheral clocks are on, except ADC  
IDLE  
20 mA  
1 mA  
30 mA  
3 mA  
5 µA  
5 µA  
10 µA  
10 µA  
Peripheral clocks are turned off  
Pins without an internal PU/PD are tied high/low  
STANDBY  
5 mA  
10mA  
Peripheral clocks are turned off  
Pins without an internal PU/PD are tied high/low  
Input clock is disabled  
HALT  
70 µA  
5 µA  
10 µA  
1 µA  
I
includes current into V  
, V  
, V  
, AV  
DDREFBG  
, and V  
DDAIO  
pins.  
DDA  
DDA1 DDA2 DD1  
93  
April 2001 − Revised December 2004  
SPRS174L  
 复制成功!