Electrical Specifications
†
6.2
Recommended Operating Conditions
MIN
3.14
NOM
3.3
MAX
3.47
UNIT
V
V
Device supply voltage, I/O
V
DDIO
1.8 V (135 MHz)
1.9 V (150 MHz)
1.71
1.81
1.8
1.9
0
1.89
2
, V
DD DD1
Device supply voltage, CPU
Supply ground
V
V
V
V
SS
, V
DDA1 DDA2
,
AV
,
ADC supply voltage
3.14
3.3
3.3
3.47
V
DDREFBG
DDAIO
V
V
Flash programming supply voltage
3.14
3.47
150
135
V
DD3VFL
V
V
= 1.9 V ± 5%
= 1.8 V ± 5%
2
2
2
Device clock frequency
(system clock)
DD
f
MHz
SYSCLKOUT
DD
All inputs except XCLKIN
XCLKIN (@ 50 µA max)
All inputs except XCLKIN
XCLKIN (@ 50 µA max)
All I/Os except Group 2
V
DDIO
V
High-level input voltage
V
V
IH
IL
0.7V
V
DD
0.8
DD
V
Low-level input voltage
0.3V
DD
− 4
High-level output source current,
I
I
mA
mA
OH
‡
V
= 2.4 V
Group 2
− 8
4
OH
Low-level output sink current,
= V MAX
All I/Os except Group 2
OL
‡
V
OL
Group 2
8
OL
A version
S version
− 40
− 40
− 40
85
°C
°C
Ambient
temperature
§
125
125
T
A
Q version
†
‡
§
See Section 6.8 for power sequencing of V
Group 2 pins are as follows: XINTF pins, T1CTRIP_PDPINTA, TDO, XCLKOUT, XF, EMU0, and EMU1.
Replaced by Q temperature option from silicon revision E onwards
, V
, V
, V
/V
/AV
DDREFBG
, and V .
DD3VFL
DDIO DDAIO DD DDA1 DDA2
91
April 2001 − Revised December 2004
SPRS174L
TI [ TEXAS INSTRUMENTS ]
