Introduction
†
Table 2−2. Signal Descriptions (Continued)
PIN NO.
‡
I/O/Z
§
GPIO
PERIPHERAL SIGNAL
PU/PD
DESCRIPTION
179-PIN
GHH
176-PIN
PGF
128-PIN
PBK
GPIOF OR XF CPU OUTPUT SIGNAL
This pin has three functions:
1. XF − General-purpose output pin.
2. XPLLDIS − This pin will be sampled
during reset to check if the PLL needs
to be disabled. The PLL will be
GPIOF14
XF_XPLLDIS (O)
A11
140
101
I/O/Z
PU
disabled if this pin is sensed low. HALT
and STANDBY modes cannot be used
when the PLL is disabled.
3. GPIO − GPIO function
GPIOG OR SCI-B SIGNALS
GPIO or SCI asynchronous serial port
transmit data
GPIOG4
GPIOG5
SCITXDB (O)
SCIRXDB (I)
P14
M13
90
91
66
67
I/O/Z
I/O/Z
−
−
GPIO or SCI asynchronous serial port
receive data
†
‡
§
Typical drive strength of the output buffer for all pins [except TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins] is 4 mA typical.
I = Input, O = Output, Z = High impedance
PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3.
NOTE:
Other than the power supply pins, no pin should be driven before the 3.3-V rail has reached
recommended operating conditions. However, it is acceptable for an I/O pin to ramp along with
the 3.3-V supply.
27
April 2001 − Revised December 2004
SPRS174L
TI [ TEXAS INSTRUMENTS ]
