SPRS174S – APRIL 2001 – REVISED MARCH 2011
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6.6
Reducing Current Consumption
28x DSPs incorporate a unique method to reduce the device current consumption. A reduction in current
consumption can be achieved by turning off the clock to any peripheral module which is not used in a
given application.
indicates the typical reduction in current consumption achieved by turning off
the clocks to various peripherals.
Table 6-3. Typical Current Consumption by Various Peripherals (at 150 MHz)
(1)
PERIPHERAL MODULE
eCAN
EVA
EVB
ADC
SCI
SPI
McBSP
(1)
(2)
I
DD
CURRENT REDUCTION (mA)
12
6
6
8
(2)
4
5
13
All peripheral clocks are disabled upon reset. Writing to/reading from peripheral registers is possible
only after the peripheral clocks are turned on.
This number represents the current drawn by the digital portion of the ADC module. Turning off the
clock to the ADC module results in the elimination of the current drawn by the analog portion of the
ADC (I
DDA
) as well.
6.7
Emulator Connection Without Signal Buffering for the DSP
shows the connection between the DSP and JTAG header for a single-processor configuration.
If the distance between the JTAG header and the DSP is greater than 6 inches, the emulation signals
must be buffered. If the distance is less than 6 inches, buffering is typically not needed.
shows
the simpler, no-buffering situation. For the pullup/pulldown resistor values, see the pin description section.
6 inches or less
V
DDIO
V
DDIO
EMU0
EMU1
TRST
TMS
TDI
TDO
TCK
DSP
13
14
2
1
3
7
11
9
EMU0
EMU1
TRST
TMS
TDI
TDO
TCK
TCK_RET
JTAG Header
PD
5
GND
GND
GND
GND
GND
4
6
8
10
12
Figure 6-5. Emulator Connection Without Signal Buffering for the DSP
96
Electrical Specifications
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