TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
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SPRS174S–APRIL 2001–REVISED MARCH 2011
Table 6-2. TMS320C281x Current Consumption by Power-Supply Pins Over Recommended Operating
Conditions During Low-Power Modes at 150-MHz SYSCLKOUT
(1)
(2)
IDD
IDDIO
IDDA
MODE
TEST CONDITIONS
TYP
MAX(3)
TYP
MAX(3)
TYP
MAX(3)
All peripheral clocks are enabled. All PWM
pins are toggled at 100 kHz.
Data is continuously transmitted out of the
SCIA, SCIB, and CAN ports. The hardware
multiplier is exercised. Code is running out of
ROM with 5 wait-states.
Operational
210 mA(4)
260 mA
20 mA
30 mA
40 mA
50 mA
•
•
XCLKOUT is turned off
IDLE
140 mA
5 mA
165 mA
10 mA
20 mA
5 µA
30 mA
20 µA
5 µA
5 µA
10 µA
10 µA
All peripheral clocks are on, except ADC
•
•
Peripheral clocks are turned off
STANDBY
Pins without an internal PU/PD are tied
high/low
•
•
Peripheral clocks are turned off
Pins without an internal PU/PD are tied
high/low
HALT
70 µA
5 µA
10 µA
1 µA
•
Input clock is disabled
(1) IDDIO current is dependent on the electrical loading on the I/O pins.
(2) IDDA includes current into VDDA1, VDDA2, AVDDREFBG, and VDDAIO pins.
(3) MAX numbers are at 125°C, and MAX voltage (VDD = 1.89 V; VDDIO, VDD3VFL, VDDA = 3.47 V).
(4) IDD represents the total current drawn from the 1.8-V rail (VDD). It includes a small amount of current (<1 mA) drawn by VDD1
.
Copyright © 2001–2011, Texas Instruments Incorporated
Electrical Specifications
93
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