TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
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SPRS174S–APRIL 2001–REVISED MARCH 2011
6.9 Signal Transition Levels
Note that some of the signals use different reference voltages, see the recommended operating conditions
table. Output levels are driven to a minimum logic-high level of 2.4 V and to a maximum logic-low level of
0.4 V.
Figure 6-7 shows output levels.
2.4 V (VOH
)
0.4 V (VOL
)
Figure 6-7. Output Levels
Output transition times are specified as follows:
•
For a high-to-low transition, the level at which the output is said to be no longer high is below VOH(MIN)
and the level at which the output is said to be low is VOL(MAX) and lower.
•
For a low-to-high transition, the level at which the output is said to be no longer low is above VOL(MAX)
and the level at which the output is said to be high is VOH(MIN) and higher.
Figure 6-8 shows the input levels.
2.0 V (VIH)
0.8 V (VIL)
Figure 6-8. Input Levels
Input transition times are specified as follows:
•
For a high-to-low transition on an input signal, the level at which the input is said to be no longer high
is below VIH(MIN) and the level at which the input is said to be low is VIL(MAX) and lower.
•
For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is
above VIL(MAX) and the level at which the input is said to be high is VIH(MIN) and higher.
NOTE
See the individual timing diagrams for levels used for testing timing parameters.
Copyright © 2001–2011, Texas Instruments Incorporated
Electrical Specifications
99
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