TMS320F28027, TMS320F28027-Q1, TMS320F28027F, TMS320F28027F-Q1, TMS320F28026
TMS320F28026-Q1, TMS320F28026F, TMS320F28026F-Q1, TMS320F28023
TMS320F28023-Q1, TMS320F28022, TMS320F28021, TMS320F28020, TMS320F280200
ZHCSA13P –NOVEMBER 2008 –REVISED FEBRUARY 2021
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9.7 Low-power Modes Block
表9-17 summarizes the various modes.
表9-17. Low-power Modes
MODE
LPMCR0(1:0)
OSCCLK
CLKIN
SYSCLKOUT
EXIT(1)
XRS, CPU watchdog interrupt, any
enabled interrupt
IDLE
00
On
On
On
Off
On
XRS, CPU watchdog interrupt, GPIO
Port A signal, debugger(2)
STANDBY
HALT(3)
01
1X
Off
Off
(CPU watchdog still running)
Off
(on-chip crystal oscillator and PLL
turned off, zero-pin oscillator and
CPU watchdog state dependent
on user code.)
XRS, GPIO Port A signal, debugger(2)
CPU watchdog
,
Off
(1) The EXIT column lists which signals or under what conditions the low-power mode is exited. A low signal, on any of the signals, exits
the low-power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise, the low-
power mode will not be exited and the device will go back into the indicated low-power mode.
(2) The JTAG port can still function even if the CPU clock (CLKIN) is turned off.
(3) The WDCLK must be active for the device to go into HALT mode.
The various low-power modes operate as follows:
IDLE Mode:
This mode is exited by any enabled interrupt that is recognized by the processor. The LPM block
performs no tasks during this mode as long as the LPMCR0(LPM) bits are set to 0,0.
STANDBY Mode:
Any GPIO port A signal (GPIO[31:0]) can wake the device from STANDBY mode. The user must
select which signal(s) will wake the device in the GPIOLPMSEL register. The selected signal(s) are
also qualified by the OSCCLK before waking the device. The number of OSCCLKs is specified in the
LPMCR0 register.
HALT Mode:
CPU watchdog, XRS, and any GPIO port A signal (GPIO[31:0]) can wake the device from HALT
mode. The user selects the signal in the GPIOLPMSEL register.
备注
The low-power modes do not affect the state of the output pins (PWM pins included). They will be in
whatever state the code left them in when the IDLE instruction was executed. See the System Control
chapter in the TMS320F2802x,TMS320F2802xx Technical Reference Manual for more details.
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