TMS320DM6437
Digital Media Processor
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SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
6.18.2 Management Data Input/Output (MDIO) Electrical Data/Timing
Table 6-90. Timing Requirements for MDIO Input (see Figure 6-50 and Figure 6-51)
-400
-500
-600
NO.
UNIT
MIN
MAX
1
2
3
4
5
tc(MDCLK)
Cycle time, MDCLK
400
180
ns
ns
ns
ns
ns
tw(MDCLK)
Pulse duration, MDCLK high/low
tt(MDCLK)
Transition time, MDCLK
5
tsu(MDIO-MDCLKH)
th(MDCLKH-MDIO)
Setup time, MDIO data input valid before MDCLK high
Hold time, MDIO data input valid after MDCLK high
10
10
1
3
3
MDCLK
4
5
MDIO
(input)
Figure 6-50. MDIO Input Timing
Table 6-91. Switching Characteristics Over Recommended Operating Conditions for MDIO Output
(see Figure 6-51)
-400
-500
-600
NO.
UNIT
MIN
MAX
7
td(MDCLKL-MDIO)
Delay time, MDCLK low to MDIO data output valid
100
ns
1
MDCLK
7
MDIO
(output)
Figure 6-51. MDIO Output Timing
282
Peripheral Information and Electrical Specifications
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