TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
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3.3.10 Boot Complete (BOOTCOMPLETE) Register
The BOOTCOMPLETE register controls the BOOTCOMPLETE pin status. The purpose is to indicate the
completion of the ROM booting process. The Boot Complete Register is shown in Figure 3-9 and described in
Table 3-11.
Figure 3-9
Boot Complete Register (BOOTCOMPLETE)
31
8
7
6
5
4
3
2
1
0
Reserved
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
R, + 0000 0000 0000 0000 0000 0000
RW,+0
RW,+0
RW,+0
RW,+0
RW,+0
RW,+0
RW,+0
RW,+0
Legend: R = Read only; RW = Read/Write; -n = value after reset
Table 3-11
Boot Complete Register (BOOTCOMPLETE) Field Descriptions
Description
Bit
31-8
7
Field
Reserved
Reserved.
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
CorePac7 boot status
0 = CorePac7 boot NOT complete
1 = CorePac7 boot complete
6
5
4
3
2
1
0
CorePac6 boot status
0 = CorePac6 boot NOT complete
1 = CorePac6 boot complete
CorePac5 boot status
0 = CorePac5 boot NOT complete
1 = CorePac5 boot complete
CorePac4 boot status
0 = CorePac4 boot NOT complete
1 = CorePac4 boot complete
CorePac3 boot status
0 = CorePac3 boot NOT complete
1 = CorePac3 boot complete
CorePac2 boot status
0 = CorePac2 boot NOT complete
1 = CorePac2 boot complete
CorePac1 boot status
0 = CorePac1 boot NOT complete
1 = CorePac1 boot complete
CorePac0 boot status
0 = CorePac0 boot NOT complete
1 = CorePac0 boot complete
End of Table 3-11
The BCx bit indicates the boot complete status of the corresponding core. All BCx bits will be sticky bits — that is
they can be set only once by the software after device reset and they will be cleared to 0 on all device resets.
Boot ROM code will be implemented such that each core will set its corresponding BCx bit immediately before
branching to the predefined location in memory.
86
Device Configuration
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