TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
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Table 7-64
Programmable Range n Registers Reset Values for MPU2
MPU2 (QM_SS CFG PORT)
Memory Page Protection
Programmable Start Address
End Address
Range
(PROGn_MPSAR)
0x02A0_0000
0x02A2_0000
0x02A4_0000
0x02A6_0000
0x02A6_8000
0x02A6_9000
0x02A6_A000
0x02A6_B000
0x02A6_C000
0x02A6_E000
0x02A8_0000
0x02A9_0000
0x02AA_0000
0x02AA_8000
0x02AB_0000
0x02AB_8000
(PROGn_MPEAR)
Attribute (PROGn_MPPA)
0x03FF_FCA4
0x000F_FCB6
0x000F_FCB6
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCA4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB4
0x03FF_FCB6
Memory Protection
PROG0
0x02A1_FFFF
0x02A3_FFFF
0x02A5_FFFF
0x02A6_7FFF
0x02A6_8FFF
0x02A6_9FFF
0x02A6_AFFF
0x02A6_BFFF
0x02A6_DFFF
0x02A6_FFFF
0x02A8_FFFF
0x02A9_FFFF
0x02AA_7FFF
0x02AA_FFFF
0x02AB_7FFF
0x02AB_FFFF
Queue Manager subsystem
configuration
PROG1
PROG2
PROG3
PROG4
PROG5
PROG6
PROG7
PROG8
PROG9
PROG10
PROG11
PROG12
PROG13
PROG14
PROG15
End of Table 7-64
Table 7-65
Programmable Range n Registers Reset Values for MPU3
MPU3 (Semaphore)
Programmable Start Address
End Address
(PROGn_MPEAR)
Memory Page Protection
Attributes (PROGn_MPPA)
Range
(PROGn_MPSAR)
Memory Protection
PROG0
0x0264_0000
0x0264_07FF
0x0003_FCB6
Semaphore
End of Table 7-65
202
Peripheral Information and Electrical Specifications
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