TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
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5.5 C66x CorePac Revision
The version and revision of the C66x CorePac can be read from the CorePac Revision ID Register (MM_REVID)
located at address 0181 2000h. The MM_REVID register is shown in Figure 5-5 and described in Table 5-2. The
C66x CorePac revision is dependant on the silicon revision being used.
Figure 5-5
CorePac Revision ID Register (MM_REVID) Address - 0181 2000h
31
16 15
0
VERSION
R-n
REVISION
R-n
Legend: R = Read; -n = value after reset
Table 5-2
CorePac Revision ID Register (MM_REVID) Field Descriptions
Bit
Field
Description
31-16 VERSION
Version of the C66x CorePac implemented on the device.
15-0
REVISION
Revision of the C66x CorePac version implemented on the device.
End of Table 5-2
5.6 C66x CorePac Register Descriptions
See the C66x CorePac Reference Guide in ‘‘Related Documentation from Texas Instruments’’ on page 73 for register
offsets and definitions.
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C66x CorePac 115
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