TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
www.ti.com
5.1.4 MSM SRAM
The MSM SRAM configuration for the C6678 device is as follows:
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Memory size is 4096KB
The MSM SRAM can be configured as shared L2 and/or shared L3 memory
Allows extension of external addresses from 2GB to up to 8GB
Has built in memory protection features
The MSM SRAM is always configured as all SRAM. When configured as a shared L2, its contents can be cached in
L1P and L1D. When configured in shared L3 mode, it’s contents can be cached in L2 also. For more details on
external memory address extension and memory protection features, see the Multicore Shared Memory Controller
(MSMC) for KeyStone Devices User Guide in ‘‘Related Documentation from Texas Instruments’’ on page 73.
5.1.5 L3 Memory
The L3 ROM on the device is 128KB. The ROM contains software used to boot the device. There is no requirement
to block accesses from this portion to the ROM.
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C66x CorePac
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