TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
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7.17 TSIP Peripheral
The telecom serial interface port (TSIP) module provides a glueless interface to common telecom serial data streams.
For more information, see the Telecom Serial Interface Port (TSIP) for the C66x DSP User Guide in ‘‘Related
Documentation from Texas Instruments’’ on page 69.
7.17.1 TSIP Electrical Data/Timing
Table 7-73
Timing Requirements for TSIP 2x Mode (1)
(see Figure 7-47)
No.
Min
61 (2)
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
tc(CLK)
Cycle time, CLK rising edge to next CLK rising edge
2
tw(CLKL)
Pulse duration, CLK low
0.4×tc(CLK)
0.4×tc(CLK)
3
tw(CLKH)
Pulse duration, CLK high
4
tt(CLK)
Transition time, CLK high to low or CLK low to high
Setup time, FS valid before rising CLK
Hold time, FS valid after rising CLK
Setup time, TR valid before rising CLK
Hold time, TR valid after rising CLK
Delay time, CLK low to TX valid
Disable time, CLK low to TX Hi-Z
2
5
tsu(FS-CLK)
th(CLK-FS)
tsu(TR-CLK)
th(CLK-TR)
td(CLKL-TX)
tdis(CLKH-TXZ)
5
5
5
5
1
2
6
7
8
9
12
10
10
End of Table 7-73
1 Polarities of XMTFSYNCP = 0b, XMTFCLKP = 0, XMTDCLKP = 1b, RCVFSYNCP = 0, RCVFCLKP = 0, RCVDCLKP = 0. If the polarity of any of the signals is inverted, then the timing
references of that signal are also inverted.
2 Timing shown is for 8.192 Mbps links. Timing for 16.384 Mbps and 32.768 Mbps links is 30.5 ns and 15.2 ns, respectively.
Figure 7-47
TSIP 2x Timing Diagram(1)
1
2
3
CLKA/B
6
5
FSA/B
8
7
TR[n]
TX[n]
ts127-3
ts127-2
ts127-2
ts127-1
ts127-1
ts127-0
ts000-7
ts000-7
ts000-6
ts000-5
ts000-5
ts000-4
ts000-4
ts000-3
ts000-3
ts000-2
ts000-2
ts000-1
ts000-1
ts000-0
ts000-0
9
ts127-3
ts127-0
ts000-6
1 Example timeslot numbering shown is for 8.192 Mbps links; 16.384 Mbps links have timeslots numbered 0 through 255 and 32.768 Mbps links have timeslots numbered 0
through 511. The data timing shown relative to the clock and frame sync signals would require a RCVDATD=1 and a XMTDATD=1
206
Peripheral Information and Electrical Specifications
Copyright 2012 Texas Instruments Incorporated