TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
1.3 Functional Block Diagram
Figure 1-1 shows the functional block diagram of the TMS320C6672 device.
Figure 1-1
Functional Block Diagram
Memory Subsystem
4MB
MSM
SRAM
64-Bit
DDR3 EMIF
MSMC
Debug & Trace
Boot ROM
Semaphore
C66x
CorePac
C66x
CorePac
Power
Management
PLL
32KB L1
P-Cache
32KB L1
P-Cache
32KB L1
D-Cache
32KB L1
D-Cache
´ 3
´ 3
512KB L2 Cache
512KB L2 Cache
EDMA
2 Cores @ up to 1.5 GHz
HyperLink
TeraNet
Multicore Navigator
Queue
Manager
Packet
DMA
Security
Accelerator
Packet
Accelerator
Network Coprocessor
16
Features
Copyright 2012 Texas Instruments Incorporated
TI [ TEXAS INSTRUMENTS ]
