TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 7-12
Boot Configuration Timing Requirements (1)
(See Figure 7-6)
No.
Min
12C
12C
Max Unit
1
2
tsu(GPIOn-RESETFULL)
th(RESETFULL-GPIOn)
Setup time - GPIO valid before RESETFULL asserted
ns
ns
Hold time - GPIO valid after RESETFULL asserted
End of Table 7-12
1 C = 1 ÷ CORECLK(N|P) frequency in ns.
Figure 7-6
Boot Configuration Timing
POR
1
RESETFULL
GPIO[15:0]
2
Copyright 2012 Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 131