TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
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7 Peripheral Information and Electrical Specifications
This chapter covers the various peripherals on the TMS320C6672 DSP. Peripheral-specific information, timing
diagrams, electrical specifications, and register memory maps are described in this chapter.
7.1 Recommended Clock and Control Signal Transition Behavior
All clocks and control signals must transition between VIH and VIL (or between VIL and VIH) in a monotonic
manner.
7.2 Power Supplies
The following sections describe the proper power-supply sequencing and timing needed to properly power on the
C6672. The various power supply rails and their primary function is listed in Table 7-1.
Table 7-1
Power Supply Rails on TMS320C6672
Name
CVDD
CVDD1
Primary Function
Voltage Notes
0.9 - 1.1 V Includes core voltage for DDR3 module
SmartReflex core supply voltage
Core supply voltage for memory
array
1.0 V
1.0 V
1.0 V
1.5 V
Fixed supply at 1.0 V
VDDT1
VDDT2
HyperLink SerDes termination
supply
Filtered version of CVDD1. Special considerations for noise. Filter is not needed if
HyperLink is not in use.
SGMII/SRIO/PCIE SerDes
termination supply
Filtered version of CVDD1. Special considerations for noise. Filter is not needed if
SGMII/SRIO/PCIE is not in use.
DVDD15
VDDR1
1.5-V DDR3 IO supply
Fixed supply at 1.5V
HyperLink SerDes regulator supply 1.5 V
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if
HyperLink is not in use.
VDDR2
VDDR3
VDDR4
PCIE SerDes regulator supply
SGMII SerDes regulator supply
SRIO SerDes regulator supply
1.5 V
1.5 V
1.5 V
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if PCIE
is not in use.
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if
SGMII is not in use.
Filtered version of DVDD15. Special considerations for noise. Filter is not needed if SRIO
is not in use.
DVDD18
AVDDA1
AVDDA2
AVDDA3
VREFSSTL
VSS
1.8-V IO supply
1.8V
Fixed supply at 1.8V
Main PLL supply
DDR3 PLL supply
PASS PLL supply
0.75-V DDR3 reference voltage
Ground
1.8 V
1.8 V
1.8 V
0.75 V
GND
Filtered version of DVDD18. Special considerations for noise.
Filtered version of DVDD18. Special considerations for noise.
Filtered version of DVDD18. Special considerations for noise.
Should track the 1.5-V supply. Use 1.5 V as source.
Ground
End of Table 7-1
Copyright 2012 Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 113
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