TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
6.2 Recommended Operating Conditions
Table 6-2
Recommended Operating Conditions (1) (2)
Min
SRVnom (3)× 0.95
SRVnom × 0.95
SRVnom × 0.95
0.95
Nom
Max Unit
SRVnom × 1.05
1000MHz - Device
0.85-1.1
CVDD
SR core supply
1250MHz - Device
1500MHz - Device
0.9-1.1
SRVnom × 1.05
V
0.9-1.1
SRVnom × 1.05
CVDD1
Core supply voltage for memory array
1.8-V supply I/O voltage
1.5-V supply I/O voltage
DDR3 reference voltage
SerDes regulator supply
PLL analog supply
1
1.05
V
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
DVDD18
DVDD15
VREFSSTL
1.71
1.8
1.89
1.425
1.5
1.575
0.49 × DVDD15
1.425
0.5 × DVDD15
0.51 × DVDD15
(4)
VDDRx
1.5
1.8
1
1.575
1.89
1.05
0
VDDAx
VDDTx
VSS
1.71
SerDes termination supply
Ground
0.95
0
0
LVCMOS (1.8 V)
I2C
0.65 × DVDD18
0.7 × DVDD18
VREFSSTL + 0.1
VIH
High-level input voltage
DDR3 EMIF
LVCMOS (1.8 V)
DDR3 EMIF
I2C
0.35 × DVDD18
VREFSSTL - 0.1
0.3 × DVDD18
85
VIL
Low-level input voltage
-0.3
Commercial
Extended
0
TC
Operating case temperature
-40
100
End of Table 6-2
1 All differential clock inputs comply with the LVDS Electrical Specification, IEEE 1596.3-1996 and all SERDES I/Os comply with the XAUI Electrical Specification, IEEE
802.3ae-2002.
2 All SERDES I/Os comply with the XAUI Electrical Specification, IEEE 802.3ae-2002.
3 SRVnom refers to the unique SmartReflex core supply voltage between 0.9 V and 1.1 V set from the factory for each individual device.
4 Where x = 1, 2, 3, 4... to indicate all supplies of the same kind.
110
Device Operating Conditions
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