ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢈꢉ ꢈꢀꢊ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉ ꢋꢀꢊ ꢀꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢈ ꢉ ꢇ ꢀ
ꢌ ꢍ ꢎꢏ ꢐꢑꢒ ꢓꢍ ꢔ ꢀ ꢐꢍ ꢕ ꢍ ꢀꢖꢗ ꢂ ꢍ ꢕꢔ ꢖꢗ ꢒ ꢘꢓ ꢆꢏ ꢂꢂꢓ ꢘꢂ
SPRS226H − NOVEMBER 2003 − REVISED AUGUST 2005
DEVICE CONFIGURATIONS (CONTINUED)
Table 27. PCI_EN and MCBSP2_EN Peripheral Selection (HPI, GP[15:9], PCI, and McBSP2)
†
PERIPHERAL SELECTION
PERIPHERALS SELECTED
PCI_EN
Pin [AA4]
MCBSP2_EN
Pin [AF3]
EEPROM
(Internal to PCI)
HPI
GP[15:9]
PCI
McBSP2
0
0
1
1
0
1
0
1
√
√
√
√
√
√
‡
√
√
√
√
†
‡
The PCI_EN pin must be driven valid at all times and the user must not switch values throughout device operation.
The MCBSP2_EN pin must be driven valid at all times and the user can switch values throughout device operation.
The only time McBSP2 is disabled is when both PCI_EN = 1 and MCBSP2_EN = 0. This configuration enables, at reset, the auto-initialization
of the PCI peripheral through the PCI internal EEPROM [provided the PCI EEPROM Auto-Initialization pin (BEA13) is pulled up
(EEAI = 1)]. The user can then enable the McBSP2 peripheral (disabling EEPROM) by dynamically changing MCBSP2_EN to a “1” after the
device is initialized (out of reset).
−
If the PCI is disabled (PCI_EN = 0), the HPI peripheral is enabled and GP[15:9] pins can be programmed
as GPIO, provided the GPxEN and GPxDIR bits are properly configured. [Note: The PCI_EN pin must
be driven valid at all times and the user must not switch values throughout device operation.]
This means all multiplexed HPI/PCI pins function as HPI and all standalone PCI pins (PCBE0 and
XSP_CS) are tied-off (Hi-Z). Also, the multiplexed GPIO/PCI pins can be used as GPIO with the
proper software configuration of the GPIO enable and direction registers (for more details, see
Table 29).
−
−
If the PCI is enabled (PCI_EN = 1), the HPI peripheral is disabled. [Note: The PCI_EN pin must be driven
valid at all times and the user must not switch values throughout device operation.]
This means all multiplexed HPI/PCI pins function as PCI. Also, the multiplexed GPIO/PCI pins function
as PCI pins (for more details, see Table 29).
The MCBSP2_EN pin, in combination with the PCI_EN pin, controls the selection of the McBSP2
peripheral and the PCI internal EEPROM (for more details, see Table 27 and its footnotes). [Note: The
MCBSP2_EN pin must be driven valid at all times and the user can switch values throughout device
operation.]
other device configurations
Table 28 describes the C6414T, C6415T, and C6416T devices configuration pins, which are set up via external
pullup/pulldown resistors through the specified EMIFB address bus pins (BEA[20:13, 11, 9:7]) and the HD5 pin.
For more details on these device configuration pins, see the Terminal Functions table and the Debugging
Considerations section.
38
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