TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, UCD9501
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
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SPRS230H–OCTOBER 2003–REVISED JUNE 2006
Table 6-46. Minimum Required Flash/OTP Wait-States at Different Frequencies
SYSCLKOUT
(MHz)
SYSCLKOUT (ns)
FLASH PAGE
WAIT-STATE
FLASH RANDOM OTP WAIT-STATE
WAIT-STATE(1)
100
75
60
50
30
25
15
4
10
13.33
16.67
20
3
2
2
1
1
0
0
0
3
2
2
1
1
1
1
1
5
4
3
2
1
1
1
1
33.33
40
66.67
250
(1) Random wait-state must be greater than or equal to 1.
6.12 ROM Timing (C280x only)
Table 6-47. ROM/OTP Access Timing
PARAMETER
Paged ROM access time
Random ROM access time
ROM (OTP area) access time
MIN
19
TYP
MAX
UNIT
ns
ta(rp)
ta(rr)
19
ns
(1)
ta(ROM)
60
ns
(1) In C280x devices, a 1K X 16 ROM block replaces the OTP block found in Flash devices.
Equations to compute the page wait-state and random wait-state in Table 6-48 are as follows:
ta(rp)
+
ǒ Ǔ* 1
ROM Page Wait-State ƪ ƫ(round up to the next highest integer) or 0, whichever is larger
tc(SCO)
ta(rr)
+
ǒ Ǔ* 1
ƪ ƫ(round up to the next highest integer) or 1, whichever is larger
ROM Random Wait-State
tc(SCO)
Table 6-48. ROM/ROM (OTP area) Minimum Required
Wait-States at Different Frequencies
SYSCLKOUT
(MHz)
SYSCLKOUT
(ns)
PAGE
WAIT-STATE
RANDOM
wait-state(1)
100
75
50
30
25
15
4
10
13.33
20
1
1
0
0
0
0
0
1
1
1
1
1
1
1
33.33
40
66.67
250
(1) Random wait-state must be greater than or equal to 1.
Electrical Specifications
125
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