TMDS361
www.ti.com ............................................................................................................................................................................................ SLLS919–DECEMBER 2008
DISSIPATION RATINGS
DERATING FACTOR(1)
ABOVE TA = 25°C
TA = 70°C
POWER RATING
PACKAGE
PCB JEDEC STANDARD
TA ≤ 25°C
Low-K
High-K
1066 mW
1481 mW
10.66 mW/°C
14.8 mW/°C
586 mW
814 mW
64-pin TQFP (PAG)
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
THERMAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX(1) UNIT
°C/W
RθJB
RθJC
Junction-to-board thermal resistance
Junction-to-case thermal resistance
37.13
15.3
560
°C/W
Device power dissipation in normal mode LP = HIGH TMDS: VID(pp) = 1200 mV, 3 Gbps
TMDS data pattern; HPD_SINK = HIGH, S1/S2 =
PD(1)
780
mW
LOW/LOW, LOW/HIGH, HIGH/HIGH
Device power dissipation in standby
mode
LP = HIGH, TMDS: VID(pp) = 1200 mV, 3 Gbps
TMDS data pattern; HPD_SINK = HIGH, S1 =
HIGH, S2 = LOW
10
PD(2)
20
2
mW
mW
mW
Device power dissipation in low-power
mode
1
PSD
LP = LOW
Device power dissipation in normal mode LP = HIGH, No TMDS input clock, HPD_SINK
PNCLK with no active TMDS input clock
40
=HIGH, S1/S2 = LOW/LOW, LOW/HIGH,
HIGH/HIGH
65
(1) The maximum rating is simulated under 3.6V VCC across worse case temperature and process variation, Typical conditions are
simulated at 3.3V VCC, 25 °C with nominal process material.
RECOMMENDED OPERATING CONDITIONS
MIN
3
NOM
MAX
3.6
UNIT
V
VCC
TA
Supply voltage
3.3
Operating free-air temperature
0
70
°C
TMDS DIFFERENTIAL OUTPUT PINS
VID(pp) Peak-to-peak input differential voltage
VIC
0.15
VCC – 0.4
3
1.56
V
V
Input common-mode voltage
TMDS output termination voltage
Data rate
VCC + 0.01
AVCC
dR
3.3
3.6
3
V
Gbps
kΩ
Ω
RVSadj
RT
Resistor for TMDS-compliant voltage output swing
Termination resistance
3.66
45
4.02
50
4.47
55
DDC PINS
VI
Input voltage
I2C data rate
0
5.5
V
dR(I2C)
100
Kbps
HPD AND CONTROL PINS
VIH
VIL
High-level input voltage
Low-level input voltage
2
0
5.5
0.8
V
V
Copyright © 2008, Texas Instruments Incorporated
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