TLC5945
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SLVS755–MARCH 2007
Figure 9 shows the dot correction data packet format which consists of 6 bits x 16 channel, total 96 bits. The
format is Big-Endian format. This means that the MSB is transmitted first, followed by the MSB-1, etc. The DC
15.5 in Figure 9 stands for the 5th-most significant bit for output 15.
MSB
0
LSB
95
5
6
89
90
DC 15.5
DC 15.0 DC 14.5
DC 1.0
DC 0.5
DC 0.0
DC OUT15
DC OUT0
DC OUT14 − DC OUT1
Figure 9. Dot Correction Data Packet Format
When MODE is set to VCC, the TLC5945 enters the dot correction data input mode. The length of input shift
register becomes 96bits. After all serial data are shifted in, the TLC5945 writes the data in the input shift register
to DC register when XLAT is high, and holds the data in the DC register when XLAT is low. The DC register is a
level triggered latch of XLAT signal. Since XLAT is a level-triggered signal, SCLK and SIN must not be changed
while XLAT is high. After XLAT goes low, data in the DC register is latched and does not change. BLANK signal
does not need to be high to latch in new data. When XLAT goes high, the new dot-correction data immediately
becomes valid and changes the output currents if BLANK is low. XLAT has setup time (tsu1) and hold time (th1)
to SCLK as shown in Figure 6.
To input data into the dot correction register, MODE must be set to VCC. The internal input shift register is then
set to 96-bit width. After all serial data are clocked in, a rising edge of XLAT is used to latch the data into the dot
correction register. Figure 10 shows the dc data input timing chart.
DC Mode Data
DC Mode Data
Input Cycle n
Input Cycle n+1
V
CC
MODE
SIN
DC n
MSB
DC n
MSB−1
DC n
MSB−2
DC n
LSB+1
DC n
LSB
DC n+1
MSB
DC n+1
MSB−1
DC n−1
LSB
t
wh0
SCLK
1
2
3
95
96
1
2
t
wl0
DC n−1
MSB
DC n−1
MSB−1
DC n−1
MSB−2
DC n−1
LSB+1
DC n−1
LSB
DC n
MSB
DC n
MSB−1
DC n
MSB−2
SOUT
XLAT
t
wh2
t
su1
t
h1
Figure 10. Dot Correction Data Input Timing Chart
SETTING GRAYSCALE
The TLC5945 can adjust the brightness of each channel OUTn using a PWM control scheme. The use of 12 bits
per channel results in 4096 different brightness steps, from 0% to 100% brightness. Equation 9 determines the
brightness level for each output n:
GSn
4095
Brightness in % +
100
(9)
where:
GSn = the programmed grayscale value for output n (GSn = 0 to 4095)
15
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