TLC5945
www.ti.com
SLVS755–MARCH 2007
PRINCIPLES OF OPERATION (continued)
MODE
XLAT
DCb
MSB
DCa
LSB
GSb1
MSB
GSa1
LSB
GSb2
MSB
GSa2
LSB
GSb3
MSB
SIN(a)
385
1
384
384
192
1
385
1
1
SCLK
96X2
192X2
SIDb2
MSB-1
GSb1
MSB
SIDb1
MSB-1
SIDb2
MSB
DCb
MSB
GSb2
MSB
SIDa1
LSB
SIDb1
MSB
-
-
-
SOUT(b)
BLANK
1
4096
1
GSCLK
OUT0
(current)
OUT1
(current)
OUT15
(current)
XERR
Figure 8. Timing Chart for Two Cascaded TLC5945 Devices
ERROR INFORMATION OUTPUT
The open-drain output XERR is used to report both of the TLC5945 error flags, TEF and LOD. During normal
operating conditions, the internal transistor connected to the XERR pin is turned off. The voltage on XERR is
pulled up to VCC through an external pullup resistor. If TEF or LOD is detected, the internal transistor is turned
on, and XERR is pulled to GND. Because XERR is an open-drain output, multiple ICs can be ORed together
and pulled up to VCC with a single pullup resistor. This reduces the number of signals needed to report a system
error (see Figure 16).
To differentiate LOD and TEF signal from XERR pin, LOD can be masked out with BLANK = HIGH.
Table 2. XERR Truth Table
ERROR CONDITION
TEMPERATURE
ERROR INFORMATION
SIGNALS
OUTn VOLTAGE
Don't Care
TEF
L
LOD
X
BLANK
XERR
TJ < T(TEF)
TJ > T(TEF)
H
L
H
L
L
L
H
Don't Care
H
X
OUTn > V(LED)
OUTn < V(LED)
OUTn > V(LED)
OUTn < V(LED)
L
L
TJ < T(TEF)
L
H
L
H
L
TJ > T(TEF)
H
H
12
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