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SLOS556 – NOVEMBER 2008
PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS
PARAMETER
f
MCLKI
tr /
tf
(MCLK)
MCLK Frequency
MCLK duty cycle
Rise/fall time for MCLK
LRCLK allowable drift before LRCLK reset
External PLL filter capacitor C1
External PLL filter capacitor C2
External PLL filter resistor R
SMD 0603 Y5V
SMD 0603 Y5V
SMD 0603, metal film
47
4.7
470
TEST CONDITIONS
MIN
2.8224
40%
50%
TYP
MAX
24.576
60%
5
4
ns
MCLKs
nF
nF
Ω
UNIT
MHz
ELECTRICAL CHARACTERISTICS
DC Characteristics
TA = 25°, PVCC_X = 18V, DVDD = AVDD = 3.3V, R
L
= 8Ω, BTL AD Mode, FS = 48KHz (unless otherwise noted)
PARAMETER
V
OH
V
OL
I
IL
I
IH
High-level output voltage
Low-level output voltage
Low-level input current
High-level input current
3.3 V supply voltage (DVDD,
AVDD)
FAULTZ and SDA
FAULTZ and SDA
TEST CONDITIONS
I
OH
= –4 mA
DVDD = 3 V
I
OL
= 4 mA
DVDD = 3 V
V
I
< V
IL
; DVDD = AVDD
= 3.6V
V
I
> V
IH
; DVDD =
AVDD = 3.6V
Normal Mode
Reset (RESET = low,
PDN = high)
Normal Mode
I
PVDD
Half-bridge supply current
No load (PVDD_X)
Reset (RESET = low,
PDN = high)
48
24
30
5
180
180
mΩ
MIN
2.4
0.5
75
75
83
32
55
13
mA
mA
TYP
MAX
UNIT
V
V
µA
µA
I
DD
3.3 V supply current
Drain-to-source resistance, LS T
J
= 25°C, includes metallization resistance
r
DS(on)
(1)
Drain-to-source resistance,
HS
Undervoltage protection limit
Undervoltage protection limit
Overtemperature error
Extra temperature drop
required to recover from error
Overload protection counter
Overcurrent limit protection
Overcurrent response time
OC programming resistor
range
Internal pulldown resistor at
the output of each half-bridge
T
J
= 25°C, includes metallization resistance
I/O Protection
V
uvp
V
uvp,hyst
OTE
(2)
OTE
HYST (2)
OLPC
I
OC
I
OCT
R
OCP
R
PD
(1)
(2)
PVDD falling
PVDD rising
7.2
7.6
150
30
f
PWM
= 384 kHz
Resistor—programmable, max. current, R
OCP
= 22 kΩ
Resistor tolerance = 5% for typical value; the minimum
resistance should not be less than 20 kΩ.
Connected when drivers are tristated to provide bootstrap
capacitor charge.
1.25
4.5
150
20
22
3
V
V
°C
°C
ms
A
ns
kΩ
kΩ
This does not include bond-wire or pin resistance.
Specified by design
Copyright © 2008, Texas Instruments Incorporated
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