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SLOS556 – NOVEMBER 2008
RESET TIMING (RESET)
Control signal parameters over recommended operating conditions (unless otherwise noted). Please refer to Recommended
Use Model section on usage of all terminals.
PARAMETER
t
w(RESET)
t
d(I2C_ready)
Pulse duration, RESET active
Time to enable I
2
C
MIN
100
13.5
TYP
MAX
UNIT
us
ms
RESET
t
w(RESET)
I C Active
t
d(I2C_ready)
2
I C Active
2
System Initialization.
Enable via I C.
T0421-01
2
NOTE: On power up, it is recommended that the TAS5707 RESET be held LOW for at least 100
µs
after DVDD has reached
3.0 V
NOTE: If the RESET is asserted LOW while PDN is LOW, then the RESET must continue to be held LOW for at least 100
µs
after PDN is deasserted (HIGH).
Figure 5. Reset Timing
TYPICAL CHARACTERISTICS, BTL CONFIGURATION
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
TOTAL HARMONIC DISTORTION + NOISE
vs
FREQUENCY
10
THD+N − Total Harmonic Distortion + Noise − %
PVDD = 12 V
R
L
= 8
Ω
1
P = 2.5 W
THD+N − Total Harmonic Distortion + Noise − %
PVDD = 18 V
R
L
= 8
Ω
1
P=5W
0.1
0.1
0.01
P=1W
0.01
P = 0.5 W
0.001
20
100
1k
f − Frequency − Hz
10k 20k
G001
0.001
20
100
1k
f − Frequency − Hz
10k 20k
G002
Figure 6.
Figure 7.
Copyright © 2008, Texas Instruments Incorporated
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