TAS5614LA
SLAS846 –MAY 2012
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AUDIO SPECIFICATION STEREO (BTL)
Audio performance is recorded as a chipset consisting of a TASxxxx PWM Processor (modulation index limited to 97.7%) and
a TAS5614LA power stage with PCB and system configurations in accordance with recommended guidelines. Audio
frequency = 1kHz, PVDD_X = 36V, GVDD_X = 12 V, RL = 4 Ω, fS = 384 kHz, ROC = 24 kΩ, TC = 75°C, Output Filter: LDEM
10 μH, CDEM = 1 µF, unless otherwise noted.
=
PARAMETER
TEST CONDITIONS
RL = 4 Ω, 10% THD+N
MIN
TYP MAX UNIT
150
125
0.03
180
10
PO
Power output per channel
W
RL = 4 Ω, 1% THD+N
THD+N
Vn
Total harmonic distortion + noise
Output integrated noise
Output offset voltage
Signal-to-noise ratio(1)
Dynamic range
1 W, 1 kHz signal
%
μV
mV
dB
dB
A-weighted, AES17 measuring filter
No signal
VOS
20
SNR
DNR
A-weighted, AES17 measuring filter
A-weighted, –60 dBFS (rel 1% THD+N)
105
105
Power dissipation due to Idle losses
(IPVDD_X)
Pidle
PO = 0, channels switching(2)
1.6
W
(1) SNR is calculated relative to 1% THD-N output level.
(2) Actual system idle losses also are affected by core losses of output inductors.
AUDIO SPECIFICATION 4 CHANNELS (SE)
Audio performance is recorded as a chipset consisting of a TASxxxx PWM Processor (modulation index limited to 97.7%) and
a TAS5614LA power stage with PCB and system configurations in accordance with recommended guidelines. Audio
frequency = 1kHz, PVDD_X = 36V, GVDD_X = 12V, RL = 4Ω, fS = 384 kHz, ROC = 24kΩ, TC = 75°C, Output Filter: LDEM
10μH, CDEM = 1µF, CDCB = 470µF, unless otherwise noted.
=
PARAMETER
TEST CONDITIONS
RL = 3 Ω, 10% THD+N
MIN
TYP MAX UNIT
50
PO
Power output per channel
W
RL = 3 Ω, 1% THD+N
42
THD+N
Vn
Total harmonic distortion + noise
Output integrated noise
Signal-to-noise ratio(1)
Dynamic range
1 W, 1 kHz signal
0.025
180
%
A-weighted, AES17 measuring filter
A-weighted, AES17 measuring filter
A-weighted, –60 dBFS (rel 1% THD+N)
μV
dB
dB
SNR
DNR
102
102
Power dissipation due to Idle losses
(IPVDD_X)
Pidle
PO = 0, channels switching(2)
1.6
W
(1) SNR is calculated relative to 1% THD-N output level.
(2) Actual system idle losses also are affected by core losses of output inductors.
8
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