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3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS144P – MAY 1992 – REVISED NOVEMBER 2006
GRD OR ZRD PACKAGE
(TOP VIEW)
1
2
3
4
5
6
TERMINAL ASSIGNMENTS
(1)
(54-Ball GRD/ZRD Package)
1
2
NC
1Q2
1Q4
1Q6
1Q8
2Q2
2Q4
2Q6
NC
3
1OE
NC
V
CC
GND
GND
GND
V
CC
NC
2OE
4
1LE
NC
V
CC
GND
GND
GND
V
CC
NC
2LE
5
NC
1D2
1D4
1D6
1D8
2D2
2D4
2D6
NC
6
1D1
1D3
1D5
1D7
2D1
2D3
2D5
2D7
2D8
A
B
C
D
E
F
G
H
J
1Q1
1Q3
1Q5
1Q7
2Q1
2Q3
2Q5
2Q7
2Q8
A
B
C
D
E
F
G
H
J
(1)
NC – No internal connection
FUNCTION TABLE
(8-BIT SECTION)
INPUTS
OE
L
L
L
H
CLK
H
H
L
X
D
H
L
X
X
OUTPUT
Q
H
L
Q
0
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
1OE
1LE
1
48
C1
1D
2
1Q1
2OE
2LE
24
25
C1
2D1
36
1D
13
2Q1
1D1
47
To Seven Other Channels
Pin numbers shown are for the DGG, DL, and WD packages.
To Seven Other Channels
3