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SN65HVD75 参数 Datasheet PDF下载

SN65HVD75图片预览
型号: SN65HVD75
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V电源RS - 485与IEC ESD保护 [3.3V-Supply RS-485 with IEC ESD Protection]
分类和应用:
文件页数/大小: 25 页 / 778 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN65HVD72  
SN65HVD75  
SN65HVD78  
www.ti.com  
SLLSE11B MARCH 2012REVISED JUNE 2012  
SWITCHING CHARACTERISTICS  
250 kbps devices (HVD70, 71, 72) bit time > 4 µs (over recommended operating conditions)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
DRIVER  
Driver differential output rise/fall  
time  
0.3  
0.7  
0.7  
1.2  
µs  
tr, tf  
RL = 54 Ω, CL = 50 pF See Figure 3  
tPHL, tPLH  
tSK(P)  
Driver propagation delay  
1
0.2  
0.4  
1
µs  
µs  
µs  
µs  
µs  
Driver pulse skew, |tPHL – tPLH  
|
tPHZ, tPLZ  
Driver disable time  
0.1  
0.5  
3
See Figure 4 and  
Receiver enabled  
Receiver disabled  
Figure 5  
tPZH, tPZL  
Driver enable time  
9
RECEIVER  
tr, tf  
Receiver output rise/fall time  
12  
75  
3
30  
100  
15  
ns  
ns  
ns  
ns  
ns  
µs  
tPHL, tPLH  
tSK(P)  
Receiver propagation delay time  
Receiver pulse skew, |tPHL – tPLH  
Receiver disable time  
CL = 15 pF  
See Figure 6  
|
tPLZ, tPHZ  
40  
20  
3
100  
50  
Driver enabled  
Driver disabled  
See Figure 7  
See Figure 8  
tPZL(1), tPZH(1)  
tPZL(2), tPZH(2)  
Receiver enable time  
8
SWITCHING CHARACTERISTICS  
20 Mbps devices (HVD73, 74, 75) bit time > 50 ns (over recommended operating conditions)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP MAX  
UNIT  
DRIVER  
Driver differential output rise/fall  
time  
2
7
7
14  
ns  
tr, tf  
RL = 54 Ω, CL = 50 pF See Figure 3  
tPHL, tPLH  
tSK(P)  
Driver propagation delay  
11  
0
17  
2
ns  
ns  
ns  
ns  
µs  
Driver pulse skew, |tPHL – tPLH  
|
tPHZ, tPLZ  
Driver disable time  
12  
10  
3
50  
20  
7
See Figure 4 and  
Receiver enabled  
Receiver disabled  
Figure 5  
tPZH, tPZL  
Driver enable time  
RECEIVER  
tr, tf  
Receiver output rise/fall time  
5
60  
0
10  
70  
6
ns  
ns  
ns  
ns  
ns  
µs  
tPHL, tPLH  
tSK(P)  
Receiver propagation delay time  
Receiver pulse skew, |tPHL – tPLH  
Receiver disable time  
CL = 15 pF  
See Figure 6  
|
tPLZ, tPHZ  
15  
10  
3
30  
50  
8
Driver enabled  
Driver disabled  
See Figure 7  
See Figure 8  
tpZL(1), tPZH(1)  
tPZL(2), tPZH(2)  
Receiver enable time  
Copyright © 2012, Texas Instruments Incorporated  
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Product Folder Link(s): SN65HVD72 SN65HVD75 SN65HVD78  
 
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