SPNS174
–
SEPTEMBER 2011
Table 1-2. Device ID Bit Allocation Register Field Descriptions
Bit
31
30-17
Field
CP15
1
UNIQUE ID
10101
Value
Description
Indicates the presence of coprocessor 15
CP15 present
Silicon version (revision) bits.
This bitfield holds a unique number for a dedicated device configuration (die).
16-13
12
11
TECH
0101
I/O VOLTAGE
0
PERIPHERAL
PARITY
1
10-9
8
7-3
2-0
FLASH ECC
10
RAM ECC
1
REVISION
101
Process technology on which the device is manufactured.
F021
I/O voltage of the device.
I/O are 3.3v
Peripheral Parity
Parity on peripheral memories
Flash ECC
Program memory with ECC
Indicates if RAM memory ECC is present.
ECC implemented
The platform family ID is always 0b101
Revision of the Device.
1.1.3.2
Die Identification Registers
The four die ID registers at addresses 0xFFFFE1F0, 0xFFFFE1F4, 0xFFFFE1F8 and FFFFE1FC form a
128-bit dieid with the information as shown in Table
Table 1-3. Die-ID Registers
Item
X Coord. on Wafer
Y Coord. on Wafer
Wafer #
Lot #
Reserved
# of Bits
8
8
6
24
82
Bit Location
7..0
15..8
21..16
45..22
127..46
Copyright
©
2011, Texas Instruments Incorporated
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