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SPNS174–SEPTEMBER 2011
Table 1-2. Device ID Bit Allocation Register Field Descriptions
Bit
Field
Value
Description
31
CP15
Indicates the presence of coprocessor 15
CP15 present
1
30-17
UNIQUE ID
10101
Silicon version (revision) bits.
This bitfield holds a unique number for a dedicated device configuration (die).
16-13
12
TECH
Process technology on which the device is manufactured.
0101
0
F021
I/O VOLTAGE
I/O voltage of the device.
I/O are 3.3v
11
PERIPHERAL
PARITY
Peripheral Parity
1
10
1
Parity on peripheral memories
Flash ECC
10-9
8
FLASH ECC
RAM ECC
Program memory with ECC
Indicates if RAM memory ECC is present.
ECC implemented
7-3
2-0
REVISION
101
Revision of the Device.
The platform family ID is always 0b101
1.1.3.2 Die Identification Registers
The four die ID registers at addresses 0xFFFFE1F0, 0xFFFFE1F4, 0xFFFFE1F8 and FFFFE1FC form a
128-bit dieid with the information as shown in Table Table 1-3.
Table 1-3. Die-ID Registers
Item
X Coord. on Wafer
Y Coord. on Wafer
Wafer #
# of Bits
Bit Location
7..0
8
8
15..8
6
21..16
Lot #
24
82
45..22
Reserved
127..46
Copyright © 2011, Texas Instruments Incorporated
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