欢迎访问ic37.com |
会员登录 免费注册
发布采购

RM48L550ZWTT 参数 Datasheet PDF下载

RM48L550ZWTT图片预览
型号: RM48L550ZWTT
PDF下载: 下载PDF文件 查看货源
内容描述: RM48Lx50 16位/ 32位RISC闪存微控制器 [RM48Lx50 16/32-Bit RISC Flash Microcontroller]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 157 页 / 2926 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号RM48L550ZWTT的Datasheet PDF文件第7页浏览型号RM48L550ZWTT的Datasheet PDF文件第8页浏览型号RM48L550ZWTT的Datasheet PDF文件第9页浏览型号RM48L550ZWTT的Datasheet PDF文件第10页浏览型号RM48L550ZWTT的Datasheet PDF文件第12页浏览型号RM48L550ZWTT的Datasheet PDF文件第13页浏览型号RM48L550ZWTT的Datasheet PDF文件第14页浏览型号RM48L550ZWTT的Datasheet PDF文件第15页  
RM48L950  
RM48L750  
RM48L550  
www.ti.com  
SPNS174SEPTEMBER 2011  
2.3 ZWT BGA Package Ball-Map (337 Ball Grid Array)  
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
AD1IN[15] AD1IN[22]  
AD1IN[11]  
/
AD2IN[11]  
N2HET1 MIBSPI5 MIBSPI1 MIBSPI1 MIBSPI5 MIBSPI5 N2HET1  
SIMO[0]  
DMM_  
DATA[0]  
AD1IN  
[06]  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VSS  
VSS  
TMS  
CAN3RX AD1EVT  
/
/
AD2IN[15] AD2IN[06]  
VSSAD  
VSSAD 19  
[10]  
NCS[0]  
SIMO  
NENA  
CLK  
[28]  
AD1IN[08] AD1IN[14] AD1IN[13]  
N2HET1 MIBSPI1 MIBSPI1 MIBSPI5 MIBSPI5 N2HET1  
SOMI[0]  
DMM_  
DATA[1]  
AD1IN  
[04]  
AD1IN  
[02]  
VSS  
TDI  
TCK  
RST  
TDO  
nTRST  
CAN3TX  
NC  
/
AD2IN[08] AD2IN[14] AD2IN[13]  
/
/
VSSAD 18  
AD1IN[09]  
[08]  
CLK  
SOMI  
NENA  
[0]  
AD1IN[10]  
/
AD2IN[10]  
EMIF_  
ADDR[21]  
EMIF_  
nWE  
MIBSPI5  
SOMI[1]  
DMM_  
CLK  
MIBSPI5 MIBSPI5 N2HET1  
[31]  
EMIF_  
nCS[3]  
EMIF_  
nCS[2]  
EMIF_  
nCS[4]  
EMIF_  
nCS[0]  
AD1IN  
[05]  
AD1IN  
[03]  
AD1IN  
[01]  
NC  
NC  
/
AD2IN[09]  
17  
SIMO[3] SIMO[2]  
AD1IN[23] AD1IN[12] AD1IN[19]  
/
AD2IN[07] AD2IN[12] AD2IN[03]  
EMIF_  
ADDR[20]  
EMIF_  
BA[1]  
MIBSPI5  
SIMO[1]  
DMM_  
NENA  
MIBSPI5 MIBSPI5  
SOMI[3] SOMI[2]  
DMM_  
SYNC  
RTCK  
NC  
NC  
NC  
NC  
NC  
NC  
/
/
ADREFLO VSSAD 16  
ADREFHI VCCAD 15  
AD1IN[21] AD1IN[20]  
EMIF_ ETM  
ADDR[19] ADDR[18] DATA[06] DATA[05] DATA[04] DATA[03] DATA[02] DATA[16] DATA[17] DATA[18] DATA[19]  
EMIF_  
ETM  
ETM  
ETM  
ETM  
ETM  
ETM  
ETM  
ETM  
NC  
NC  
NC  
NC  
/
AD2IN[05] AD2IN[04]  
/
AD1IN[18]  
/
AD2IN[02]  
N2HET1  
[26]  
EMIF_ ETM  
ADDR[17] ADDR[16] DATA[07]  
EMIF_  
AD1IN  
[07]  
AD1IN  
[0]  
nERROR  
VCCIO  
VCCIO  
VCCIO  
VCCIO  
VCC  
VCCIO  
VCCIO  
VCC  
VCC  
VCCIO  
VCCIO  
VCCIO  
VCCIO  
VCCIO  
VCCIO  
VCCPLL  
VCC  
NC  
NC  
14  
13  
12  
11  
AD1IN[17] AD1IN[16]  
/
AD2IN[01] AD2IN[0]  
N2HET1 N2HET1  
[17]  
EMIF_  
ADDR[15]  
ETM  
DATA[12]  
ETM  
DATA[01]  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
/
NC  
NC  
NC  
[19]  
N2HET1  
[04]  
EMIF_  
ADDR[14]  
ETM  
DATA[13]  
ETM  
DATA[0]  
MIBSPI5  
NCS[3]  
ECLK  
VSS  
VSS  
VCC  
VSS  
VSS  
VSS  
VSS  
VSS  
VSS  
VSS  
VCC  
VSS  
VSS  
VSS  
VCC  
VSS  
VSS  
VSS  
VSS  
VSS  
VSS  
VSS  
VCC  
VSS  
VSS  
NC  
NC  
NC  
NC  
ETME  
TRACE  
CTL  
N2HET1 N2HET1  
[14] [30]  
EMIF_  
ADDR[13]  
ETM  
DATA[14]  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
ETM  
TRACE  
CLKOUT  
EMIF_  
ADDR[12]  
ETM  
DATA[15]  
MIBSPI3  
NCS[0]  
10 CAN1TX CAN1RX  
NC  
GIOB[3] 10  
ETM  
TRACE  
CLKIN  
N2HET1  
[27]  
EMIF_  
ADDR[11]  
ETM  
DATA[08]  
MIBSPI3 MIBSPI3  
CLK  
9
8
7
6
5
4
3
2
1
NC  
NC  
VCC  
VCCIO  
VCCIO  
VCCIO  
NC  
9
8
7
6
5
4
3
2
1
NENA  
EMIF_  
ADDR[10]  
ETM  
DATA[09]  
ETM  
DATA[31]  
MIBSPI3 MIBSPI3  
SOMI  
NC  
VCCP  
VCCIO  
NC  
SIMO  
EMIF_  
ADDR[9]  
ETM  
DATA[10]  
ETM  
DATA[30]  
N2HET1  
[09]  
nPORRST  
LINRX  
LINTX  
NC  
MIBSPI5  
NCS[1]  
EMIF_  
ADDR[8]  
ETM  
DATA[11]  
ETM  
DATA[29]  
N2HET1 MIBSPI5  
[05] NCS[2]  
GIOA[4]  
NC  
VCCIO  
ETM  
VCCIO  
ETM  
VCCIO  
FLTP2  
VCCIO  
FLTP1  
VCC  
ETM  
VCC  
ETM  
VCCIO  
ETM  
VCCIO  
ETM  
VCCIO  
ETM  
NC  
EMIF_  
EMIF_  
ETM  
ETM  
MIBSPI3 N2HET1  
NCS[1]  
GIOA[0] GIOA[5]  
N2HET1 N2HET1  
NC  
ADDR[7] ADDR[1] DATA[20] DATA[21] DATA[22]  
DATA[23] DATA[24] DATA[25] DATA[26] DATA[27] DATA[28]  
[02]  
EMIF_ EMIF_  
ADDR[6] ADDR[0]  
N2HET1 N2HET1  
[21]  
EMIF_  
nCAS  
NC  
NC  
NC  
NC]  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
[16]  
[12]  
[23]  
N2HET1 N2HET1 MIBSPI3  
NCS[3]  
SPI2  
NENA  
N2HET1 MIBSPI1 MIBSPI1  
[11] NCS[1] NCS[2]  
MIBSPI1  
NCS[3]  
EMIF_  
CLK  
EMIF_  
CKE  
NH2ET1  
[25]  
SPI2  
NCS[0]  
EMIF_  
nWAIT  
EMIF_  
nRAS  
N2HET1  
[06]  
GIOA[6]  
NC  
NC  
[29]  
[22]  
MIBSPI3  
NCS[2]  
SPI2  
SOMI  
KELVIN_  
GND  
N2HET1 N2HET1 MIBSPI1  
[20]  
N2HET1  
[01]  
VSS  
GIOA[1]  
SPI2 CLK GIOB[2] GIOB[5] CAN2TX GIOB[6] GIOB[1]  
GIOB[0]  
TEST  
VSS  
[13]  
NCS[0]  
SPI2  
SIMO  
N2HET1  
[18]  
N2HET1 N2HET1  
[24]  
N2HET1 N2HET1  
[07]  
VSS  
A
VSS  
B
GIOA[2]  
C
GIOA[3] GIOB[7] GIOB[4] CAN2RX  
OSCIN  
K
OSCOUT GIOA[7]  
NC  
R
VSS  
V
VSS  
W
[15]  
[03]  
D
E
F
G
H
J
L
M
N
P
T
U
Figure 2-4. ZWT Package Pinout. Top View  
Note: Balls can have multiplexed functions. Only the default function is depicted in above diagram, except  
for the EMIF signals that are multiplexed with ETM signals.  
Copyright © 2011, Texas Instruments Incorporated  
Device Package and Terminal Functions  
11  
Submit Documentation Feedback  
focus.ti.com: RM48L950 RM48L750 RM48L550  
 复制成功!