RM46L450
RM46L850
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SPNS184 –SEPTEMBER 2012
5.3.3 Input Connections to eQEPx Modules
The input connections to each of the eQEP modules can be selected between a double-VCLK4-
synchronized input or a double-VCLK4-synchronized and filtered input, as shown in Table 5-12.
Table 5-12. Device-Level Input Connection to eCAPx Modules
Input Signal
Control for Double-Synchronized Connection to
eQEPx
Control for Double-Synchronized and Filtered
Connection to eQEPx
eQEP1A
eQEP1B
eQEP1I
eQEP1S
eQEP2A
eQEP2B
eQEP2I
eQEP2S
PINMMR44[16] = 1
PINMMR44[24] = 1
PINMMR45[0] = 1
PINMMR45[8] = 1
PINMMR45[16] = 1
PINMMR45[24] = 1
PINMMR46[0] = 1
PINMMR46[8] = 1
PINMMR44[16] = 0 and PINMMR44[17] = 1
PINMMR44[24] = 0 and PINMMR44[25] = 1
PINMMR45[0] = 0 and PINMMR45[1] = 1
PINMMR45[8] = 0 and PINMMR45[9] = 1
PINMMR45[16] = 0 and PINMMR45[17] = 1
PINMMR45[24] = 0 and PINMMR45[25] = 1
PINMMR46[0] = 0 and PINMMR46[1] = 1
PINMMR46[8] = 0 and PINMMR46[9] = 1
5.3.4 Enhanced Quadrature Encoder Pulse (eQEPx) Timing
Table 5-13. eQEPx Timing Requirements
PARAMETER
QEP input period
TEST CONDITIONS
MIN
MAX
UNIT
cycles
cycles
tw(QEPP)
Synchronous
2 tc(VCLK4)
Synchronous, with input 2 tc(VCLK4) + filter width
filter
tw(INDEXH)
QEP Index Input High Time
QEP Index Input Low Time
Synchronous
2 tc(VCLK4)
cycles
cycles
Synchronous, with input 2 tc(VCLK4) + filter width
filter
tw(INDEXL)
Synchronous
2 tc(VCLK4)
cycles
cycles
Synchronous, with input 2 tc(VCLK4) + filter width
filter
tw(STROBH) QEP Strobe Input High Time
tw(STROBL) QEP Strobe Input Low Time
Synchronous
2 tc(VCLK4)
cycles
cycles
Synchronous, with input 2 tc(VCLK4) + filter width
filter
Synchronous
2 tc(VCLK4)
cycles
cycles
Synchronous, with input 2 tc(VCLK4) + filter width
filter
Table 5-14. eQEPx Switching Characteristics
PARAMETER
MIN
MAX
UNIT
td(CNTR)xin
Delay time, external clock to counter increment
4 tc(VCLK4)
6 tc(VCLK4)
cycles
cycles
td(PCS-OUT)QEP
Delay time, QEP input edge to position compare sync output
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Peripheral Information and Electrical Specifications
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