PCM9211
SBAS495 –JUNE 2010
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Register 5Ah–5Fh, DIR Channel Status Data Buffer
(Address : 5Ah–5Fh, Read-Only)
DATA
Address
B7
B6
B5
B4
B3
B2
B1
B0
RXCS7
CS Bit7
RXCS6
RXCS5
RXCS4
RXCS3
RXCS2
RXCS1
CS Bit1
RXCS9
CS Bit9
RXCS17
CS Bit17
RXCS25
CS Bit25
RXCS33
CS Bit33
RXCS41
CS Bit41
RXCS0
5Ah
5Bh
5Ch
5Dh
5Eh
5Fh
CS Bit6
RXCS14
CS Bit14
RXCS22
CS Bit22
RXCS30
CS Bit30
RXCS38
CS Bit38
RXCS46
CS Bit46
CS Bit5
RXCS13
CS Bit13
RXCS21
CS Bit21
RXCS29
CS Bit29
RXCS37
CS Bit37
RXCS45
CS Bit45
CS Bit4
RXCS12
CS Bit12
RXCS20
CS Bit20
RXCS28
CS Bit28
RXCS36
CS Bit36
RXCS44
CS Bit44
CS Bit3
RXCS11
CS Bit11
RXCS19
CS Bit19
RXCS27
CS Bit27
RXCS35
CS Bit35
RXCS43
CS Bit43
CS Bit2
RXCS10
CS Bit10
RXCS18
CS Bit18
RXCS26
CS Bit26
RXCS34
CS Bit34
RXCS42
CS Bit42
CS Bit0
RXCS8
RXCS15
CS Bit15
RXCS23
CS Bit23
RXCS31
CS Bit31
RXCS39
CS Bit39
RXCS47
CS Bit47
CS Bit8
RXCS16
CS Bit16
RXCS24
CS Bit24X
RXCS32
CS Bit32
RXCS40
CS Bit40
RXCS0: Use of channel status block
RXCS1: Linear PCM information
RXCS2: Copyright information
RXCS5 – RXCS3: Additional format information
RXCS7– RXCS6: Channel status mode
RXCS15 – RXCS8: Category code
RXCS19 – RXCS16: Source number
RXCS23 – RXCS20: Channel number
RXCS27 – RXCS24: Sampling frequency
RXCS29 – RXCS28: Clock accuracy
RXCS31 – RXCS30: Not defined
RXCS32: Maximum audio sample word length
RXCS35 – RXCS33: Sample word length
RXCS39 – RXCS36: Original sampling frequency
RXCS47 – RXCS40: Not defined
xx of RXCSxx represents the serial number of the channel status data. L-channel data of the channel status is
stored in this register. Its default value is not specified. Therefore, wait until the ERROR/INT0 port goes low and
192 samples pass to read RXCS. RXCS is cleared when DIR unlocks and an L-ch parity error is detected.
92
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