OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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1
MASTER MODE
POLARITY = 0 PHASE = 0
2
3
SPIx_CLK
5
4
6
SPIx_SIMO
SPIx_SOMI
MO(0)
7
MO(1)
MO(n−1)
MO(n)
MI(n)
8
MI(0)
MI(1)
MI(n−1)
MASTER MODE
POLARITY = 0 PHASE = 1
4
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
6
5
MO(0)
7
MO(1)
MI(1)
MO(n−1)
MI(n−1)
MO(n)
MI(n)
8
MI(0)
4
MASTER MODE
POLARITY = 1 PHASE = 0
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
5
6
MO(0)
7
MO(1)
MI(1)
MO(n−1)
MO(n)
MI(n)
8
MI(0)
MI(n−1)
MASTER MODE
POLARITY = 1 PHASE = 1
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
5
4
6
MO(0)
7
MO(1)
MI(1)
MO(n−1)
MI(n−1)
MO(n)
MI(n)
8
MI(0)
Figure 6-37. SPI Timings—Master Mode
160
Peripheral Information and Electrical Specifications
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