OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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SDRAM
4M x 16 x 4
Bank
EMIFB
EMB_CS
EMB_CAS
CE
CAS
RAS
WE
EMB_RAS
EMB_WE
EMB_CLK
CLK
CKE
EMB_SDCKE
EMB_BA[1:0]
EMB_A[12:0]
EMB_WE_DQM[0]
EMB_WE_DQM[1]
EMB_D[15:0]
EMB_WE_DQM[2]
EMB_WE_DQM[3]
EMB_D[31:16]
BA[1:0]
A[12:0]
LDQM
UDQM
DQ[15:0]
SDRAM
4M x 16 x 4
Bank
CE
CAS
RAS
WE
CLK
CKE
BA[1:0]
A[12:0]
LDQM
UDQM
DQ[15:0]
Figure 6-22. EMIFB to Dual 4M × 16 × 4 bank SDRAM Interface
Table 6-22. Example of 16/32-bit EMIFB Address Pin Connections
SDRAM Size
Width
Banks
Address Pins
A[11:0]
64M bits
×16
4
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
EMB_A[11:0]
A[10:0]
×32
×16
×32
×16
×32
×16
×32
4
4
4
4
4
4
4
EMB_A[10:0]
A[11:0]
128M bits
256M bits
512M bits
EMB_A[11:0]
A[11:0]
EMB_A[11:0]
A[12:0]
EMB_A[12:0]
A[11:0]
EMB_A[11:0]
A[12:0]
EMB_A[12:0]
A[12:0]
EMB_A[12:0]
Table 6-23 is a list of the EMIFB registers.
116
Peripheral Information and Electrical Specifications
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