ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
ꢀ ꢉꢊꢋ ꢌ ꢁꢉ ꢍ ꢎꢏꢐ ꢀ ꢉꢑꢒꢓ ꢑꢓ ꢎꢔ ꢒꢓ ꢐꢐ ꢋꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, built-in reference
PARAMETER
TEST CONDITIONS
REF2_5V = 1 for 2.5 V
≤ I max
MIN NOM
MAX
UNIT
3 V
2.4
2.5
1.5
2.6
I
VREF+
VREF+
Positive built-in reference
voltage output
V
REF+
V
REF2_5V = 0 for 1.5 V
2.2 V/3 V
1.44
2.2
1.56
I
≤ I max
VREF+
VREF+
REF2_5V = 0, I
REF2_5V = 1, I
REF2_5V = 1, I
≤ 1mA
≤ 0.5mA
≤ 1mA
VREF+
VREF+
VREF+
AV
CC
minimum voltage,
V
V
+ 0.15
Positive built-in reference
active
AV
CC(min)
V
REF+
REF+
+ 0.15
2.2 V
3 V
0.01
−0.5
−1
Load current out of V
terminal
REF+
I
mA
VREF+
I
= 500 µA +/− 100 µA
2.2 V
3 V
2
2
VREF+
Analog input voltage ~0.75 V;
REF2_5V = 0
LSB
Load-current regulation
terminal
†
I
L(VREF)+
V
I
= 500 µA 100 µA
REF+
VREF+
Analog input voltage ~1.25 V;
REF2_5V = 1
3 V
3 V
2
LSB
I
C
=100 µA → 900 µA,
=5 µF, ax ~0.5 x V
VREF+
VREF+
Load current regulation
terminal
‡
I
20
ns
REF+
DL(VREF) +
V
REF+
Error of conversion result ≤ 1 LSB
Capacitance at pin V
(see Note 1)
REFON =1,
REF+
C
2.2 V/3 V
2.2 V/3 V
5
10
µF
VREF+
0 mA ≤ I max
≤ I
VREF+ VREF+
Temperature coefficient of
built-in reference
I
is a constant in the range of
VREF+
0 mA ≤ I
†
T
100 ppm/°C
REF+
≤ 1 mA
VREF+
Settle time of internal
reference voltage (see
Figure 13 and Note 2)
I
V
= 0.5 mA, C
= 10 µF,
= 2.2 V
AVCC
VREF+
= 1.5 V, V
VREF+
†
17
ms
t
REFON
REF+
†
‡
Not production tested, limits characterized
Not production tested, limits verified by design
NOTES: 1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses
two capacitors between pins V
NOTES: 2. The condition is that the error in a conversion started after t
capacitive load.
and AV
and V
/V
and AV : 10 µF tantalum and 100 nF ceramic.
is less than 0.5 LSB. The settling time depends on the external
REF+
SS
REF− eREF−
SS
REFON
C
VREF+
100 µF
t
≈ .66 x C
[ms] with C in µF
VREF+
REFON
VREF+
10 µF
1 µF
0
10 ms
1 ms
100 ms
t
REFON
Figure 13. Typical Settling Time of Internal Reference t
vs External Capacitor on V
+
REFON
REF
35
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