ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃ ꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃꢆ ꢇ
ꢀ ꢉ ꢊ ꢋꢌ ꢁꢉ ꢍꢎ ꢏ ꢐ ꢀꢉ ꢑ ꢒꢓꢑ ꢓꢎ ꢔꢒ ꢓꢐ ꢐꢋ ꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, power supply and input range conditions (see Note 1)
PARAMETER
TEST CONDITIONS
MIN NOM
MAX
UNIT
AV
AV
and DV
are connected together
are connected together
CC
SS
CC
AV
Analog supply voltage
and DV
2.2
3.6
V
CC
SS
V
= V
= 0 V
(AVSS)
(DVSS)
All P6.0/A0 to P6.7/A7 terminals. Analog inputs
selected in ADC12MCTLx register and P6Sel.x=1
Analog input voltage
range (see Note 2)
V
0
V
V
(P6.x/Ax)
AVCC
0 ≤ x ≤ 7; V
≤ V
≤ V
(AVSS)
P6.x/Ax
(AVCC)
Operating supply current
f
= 5.0 MHz
2.2 V
0.65
0.8
1.3
1.6
ADC12CLK
into AV
(see Note 3)
terminal
ADC12ON = 1, REFON = 0
SHT0=0, SHT1=0, ADC12DIV=0
I
mA
mA
CC
ADC12
REF+
3 V
3 V
f
= 5.0 MHz
ADC12CLK
ADC12ON = 0,
0.5
0.8
Operating supply current
REFON = 1, REF2_5V = 1
I
into AV
(see Note 4)
terminal
CC
f
= 5.0 MHz
2.2 V
3 V
0.5
0.5
0.8
0.8
ADC12CLK
ADC12ON = 0,
mA
REFON = 1, REF2_5V = 0
Only one terminal can be selected
at one time, P6.x/Ax
†
C
R
Input capacitance
2.2 V
3 V
40
pF
I
I
†
Input MUX ON resistance 0V ≤ V ≤ V
Ax AVCC
2000
Ω
†
Not production tested, limits verified by design
NOTES: 1. The leakage current is defined in the leakage current table with P6.x/Ax parameter.
2. The analog input voltage range must be within the selected reference voltage range V
to V
for valid conversion results.
R+
R−
3. The internal reference supply current is not included in current consumption parameter I
.
ADC12
4. The internal reference current is supplied via terminal AV . Consumption is independent of the ADC12ON control bit, unless a
CC
conversion is active. The REFON bit enables to settle the built-in reference before starting an A/D conversion.
12-bit ADC, external reference (see Note 1)
PARAMETER
TEST CONDITIONS
MIN NOM
MAX
UNIT
Positive external
reference voltage input
V
V
> V
/V
REF− eREF−
(see Note 2)
(see Note 3)
(see Note 4)
1.4
V
V
eREF+
eREF+
AVCC
1.2
Negative external
reference voltage input
V
V
V
> V /V
REF− eREF−
0
V
V
REF− / eREF−
eREF+
(V
−
Differential external
reference voltage input
eREF+
V
> V
/V
1.4
V
AVCC
eREF+
REF− eREF−
V
V
)
REF−/ eREF−
I
I
Static input current
Static input current
0V ≤V
≤ V
AVCC
2.2 V/3 V
2.2 V/3 V
1
1
µA
µA
VeREF+
eREF+
0V ≤ V
eREF−
≤ V
AVCC
VREF−/VeREF−
NOTES: 1. The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, C , is also
i
the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 12-bit accuracy.
2. The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
3. The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
4. The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.
34
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