ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
ꢀ ꢉꢊꢋ ꢌ ꢁꢉ ꢍ ꢎꢏꢐ ꢀ ꢉꢑꢒꢓ ꢑꢓ ꢎꢔ ꢒꢓ ꢐꢐ ꢋꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
main DCO characteristics
D
D
Individual devices have a minimum and maximum operation frequency. The specified parameters for
fDCOx0 to fDCOx7 are valid for all devices.
All ranges selected by Rsel(n) overlap with Rsel(n+1): Rsel0 overlaps with Rsel1, ... Rsel6 overlaps with
Rsel7.
D
DCO control bits DCO0, DCO1, and DCO2 have a step size as defined by parameter SDCO.
D
Modulation control bits MOD0 to MOD4 select how often fDCO+1 is used within the period of 32 DCOCLK
cycles. The frequency f(DCO) is used for the remaining cycles. The frequency is an average equal to
MOD/32
f(DCO) × (2
).
DCO when using R
(see Note 1)
OSC
PARAMETER
TEST CONDITIONS
V
MIN
NOM
1.8 15%
1.95 15%
MAX
UNIT
MHz
MHz
CC
2.2 V
3 V
R
T
= 4, DCO = 3, MOD = 0, DCOR = 1,
sel
A
f
, DCO output frequency
DCO
= 25°C
D , Temperature drift
R
R
= 4, DCO = 3, MOD = 0, DCOR = 1
= 4, DCO = 3, MOD = 0, DCOR = 1
2.2 V/3 V
2.2 V/3 V
0.1
10
%/°C
t
sel
sel
D , Drift with V
v
variation
%/V
CC
NOTES: 1. R
= 100kΩ. Metal film resistor, type 0257. 0.6 watt with 1% tolerance and T
=
50ppm/°C.
OSC
K
crystal oscillator, LFXT1 oscillator (see Note 1)
PARAMETER
TEST CONDITIONS
XTS=0; LF oscillator selected
= 2.2 V/3 V
MIN
NOM
MAX
UNIT
12
V
CC
XTS=1; XT1 oscillator selected
= 2.2 V/3 V
C
C
Integrated input capacitance
pF
XIN
2
12
2
V
CC
XTS=0; LF oscillator selected
= 2.2 V/3 V
V
CC
XTS=1; XT1 oscillator selected
Integrated output capacitance
Input levels at XIN
pF
XOUT
V
CC
= 2.2 V/3 V
V
V
V
0.2 × V
CC
V
V
IL
SS
0.8 × V
V
CC
= 2.2 V/3 V (see Note 2)
V
CC
IH
CC
NOTES: 1. The oscillator needs capacitors at both terminals, with values specified by the crystal manufacturer.
2. Applies only when using an external logic-level clock source. Not applicable when using a crystal or resonator.
crystal oscillator, XT2 oscillator (see Note 1)
PARAMETER
TEST CONDITIONS
= 2.2 V/3 V
MIN
NOM
MAX
UNIT
pF
pF
V
C
C
Input capacitance
Output capacitance
V
V
2
2
XT2IN
XT2OUT
IL
CC
= 2.2 V/3 V
CC
V
V
V
0.2 × V
CC
SS
0.8 × V
Input levels at XT2IN
V
CC
= 2.2 V/3 V (see Note 2)
V
CC
V
IH
CC
NOTES: 1. The oscillator needs capacitors at both terminals, with values specified by the crystal manufacturer.
2. Applies only when using an external logic-level clock source. Not applicable when using a crystal or resonator.
USART0, USART1 (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
200
150
NOM MAX
UNIT
V
CC
V
CC
= 2.2 V
= 3 V
430
280
800
500
t
(τ)
USART0/1: deglitch time
ns
NOTE 1: The signal applied to the USART0/1 receive signal/terminal (URXD0/1) should meet the timing requirements of t to ensure that the
(τ)
(τ)
URXS flip-flop is set. The URXS flip-flop is set with negative pulses meeting the minimum-timing condition of t . The operating
conditions to set the flag must be met independently from this timing constraint. The deglitch circuitry is active only on negative
transitions on the URXD0/1 line.
33
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