ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
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SLAS272F − JULY 2000 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
wake-up LPM3
PARAMETER
TEST CONDITIONS
f = 1 MHz
MIN
TYP
TYP
MAX
UNIT
6
6
6
f = 2 MHz
f = 3 MHz
t
Delay time
V
CC
= 2.2 V/3 V
µs
(LPM3)
RAM
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VRAMh
CPU HALTED (see Note 1)
1.6
V
NOTE 1: This parameter defines the minimum supply voltage when the data in program memory RAM remain unchanged. No program execution
should take place during this supply voltage condition.
Comparator_A (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
25
MAX UNIT
V
V
= 2.2 V
= 3 V
40
µA
60
CC
I
I
CAON=1, CARSEL=0, CAREF=0
(DD)
45
CC
CAON=1, CARSEL=0,
CAREF=1/2/3, no load at
P2.3/CA0/TA1 and P2.4/CA1/TA2
V
= 2.2 V
= 3 V
30
45
50
µA
71
CC
CC
(Refladder/Refdiode)
V
Common-mode input
voltage
V
CAON =1
V
= 2.2 V/3 V
= 2.2 V/3 V
0
V −1
CC
V
(IC)
CC
CC
PCA0=1, CARSEL=1, CAREF=1,
no load at P2.3/CA0/TA1 and
P2.4/CA1/TA2
Voltage @ 0.25 V
CC
node
V
V
0.23
0.24
0.48
0.25
0.5
(Ref025)
V
CC
PCA0=1, CARSEL=1, CAREF=2,
no load at P2.3/CA0/TA1 and
P2.4/CA1/TA2
Voltage @ 0.5V
node
CC
V
V
CC
= 2.2 V/3 V
0.47
(Ref050)
(RefVT)
V
CC
PCA0=1, CARSEL=1, CAREF=3,
no load at P2.3/CA0/TA1 and
P2.4/CA1/TA2 T = 85°C
V
V
= 2.2 V
= 3 V
390
400
480
490
540
550
CC
V
(see Figure 6)
Offset voltage
mV
CC
A
V
V
See Note 2
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.2 V/3 V
= 2.2 V/3 V
= 2.2 V
= 3 V
−30
0
30
1.4
mV
mV
(offset)
Input hysteresis
CAON=1
0.7
210
150
1.9
hys
130
80
300
240
3.4
T
= 25°C, Overdrive 10 mV,
A
ns
µs
ns
µs
Without filter: CAF=0
t
(response LH)
= 2.2 V
= 3 V
1.4
0.9
130
80
T
= 25°C, Overdrive 10 mV,
A
With filter: CAF=1
1.5
2.6
= 2.2 V
= 3 V
210
150
300
240
T
= 25°C, Overdrive 10 mV,
A
Without filter: CAF=0
t
(response HL)
V
= 2.2 V
= 3 V
1.4
0.9
1.9
1.5
3.4
2.6
T
= 25°C, Overdrive 10 mV,
CC
CC
A
With filter: CAF=1
V
NOTES: 1. The leakage current for the Comparator_A terminals is identical to I
specification.
lkg(Px.x)
2. The input offset voltage can be cancelled by using the CAEX bit to invert the Comparator_A inputs on successive measurements.
The two successive measurements are then summed together.
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
