MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
Terminal Functions (continued)
TERMINAL
NO.
I/O
DESCRIPTION
NAME
64
48
PIN
PIN
General-purpose digital I/O pin
input port of the fourth most positive analog LCD level (V1)
P5.3/R03
40
29
28
27
26
25
I/O
I/O
I/O
I/O
I/O
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
P5.4/COM3
P5.5/COM2
P5.6/COM1
P5.7/COM0
39
38
37
36
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
General-purpose digital I/O pin
common output, COM0--3 are used for LCD backplanes
General-purpose digital I/O pin
†
P6.0/TA1.2/A2 /
CA4
Timer1_A5, compare: Out2 output
63
47
I/O
†
ADC10 analog input A2
Comparator_A input 4
P6.1/
UCB0SOMI /
UCB0SCL
General-purpose digital I/O pin
2
†
1
2
1
2
I/O
I/O
2
†
USCI B0 slave out/master in in SPI mode, SCL I C clock in I C mode
†
P6.2/
UCB0SIMO /
UCB0SDA
General-purpose digital I/O pin
†
2
2
†
USCI B0 slave in/master out in SPI mode, SDA I C data in I C mode
†
General-purpose digital I/O pin
P6.3/UCB0STE/
UCA0CLK/A3/
USCI B0 slave transmit enable/USCI A0 clock input/output
ADC10 analog input A3 / negative reference
Comparator_A input 5
3
4
--
--
I/O
I/O
CA5/V
/V
eref-- ref--
General-purpose digital I/O pin
P6.4/UCB0CLK/
UCA0STE/A4/
USCI B0 clock input/output, USCI A0 slave transmit enable
ADC10 analog input A4/ positive reference
Comparator_A input 6
CA6/V
/V
eref+ ref+
General-purpose digital I/O pin
I/O USCI A0 receive data input in UART mode, slave data out/master in in SPI mode
ADC10 analog input A5
P6.5/UCA0RXD/
UCA0SOMI/A5
5
6
--
--
General-purpose digital I/O pin
I/O USCI A0 transmit data output in UART mode, slave data in/master out SPI mode
ADC10 analog input A6
P6.6/UCA0TXD/
UCA0SIMO/A6
General-purpose digital I/O pin
ADC10 analog input A7
Comparator_A input 7
SVS input
P6.7/A7/CA7/
SVSIN
11
54
7
I/O
P7.0/TDO/TDI/
S32
38
I/O General-purpose digital I/O pin
JTAG test data output terminal or test data input in programming an test
LCD segment output
P7.1/TDI/TCLK/
S33
55
56
39
40
I/O General-purpose digital I/O pin
JTAG test data input or test clock input in programming an test
LCD segment output
P7.2/TMS/S34
I/O General-purpose digital I/O pin
JTAG test mode select, input terminal for device programming and test
LCD segment output
†
64-pin package devices only
8
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