MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
functional block diagram
XIN
XOUT
DVCC
DVSS
RAM
AVCC
AVSS
P1.x/P2.x
2x8
P3.x/P4.x
2x8
P5.x/P6.x
2x8
P7.x
1x7
ACLK
Oscillators
FLL+
VLO
Ports
P1/P2
ADC10
USCI A0
UART/
LIN,
Port
P7
Ports
P3/P4
Ports
P5/P6
SMCLK
Flash
10--bit
8 Channels
Autoscan
DTC
IrDA, SPI
2x8 I/O
Interrupt
capability
16kB
8kB
512B
512B
1x7 I/O
2x8 I/O
2x8 I/O
MCLK
USCI B0
SPI, I2C
CPU
64kB
MAB
incl. 16
Registers
MDB
EEM
Brownout
Protection
LCD_A
144
Segments
1,2,3,4
Mux
Basic
Timer &
Real--
Time
Watchdog
WDT+
Timer_A3
Timer _A5
Comparator
_A+
JTAG
Interface
3 CC
Registers
5 CC
Registers
SVS,
SVM
15--Bit
Clock
S p y --B i --
Wire
RST/NMI
NOTE: The USCI A0 and USCI B0 cannot be used in the 48-pin package options (RGZ).
5
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