MSP430F530x, MSP430F5310
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SLAS677B –SEPTEMBER 2010–REVISED MARCH 2011
Table 33. TA1 Registers (Base Address: 0380h)
REGISTER DESCRIPTION
REGISTER
OFFSET
TA1 control
TA1CTL
00h
02h
04h
06h
10h
12h
14h
16h
20h
2Eh
Capture/compare control 0
Capture/compare control 1
Capture/compare control 2
TA1 counter register
TA1CCTL0
TA1CCTL1
TA1CCTL2
TA1R
Capture/compare register 0
Capture/compare register 1
Capture/compare register 2
TA1 expansion register 0
TA1 interrupt vector
TA1CCR0
TA1CCR1
TA1CCR2
TA1EX0
TA1IV
Table 34. TB0 Registers (Base Address: 03C0h)
REGISTER DESCRIPTION
REGISTER
TB0CTL
OFFSET
TB0 control
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
1Ah
1Ch
1Eh
20h
2Eh
Capture/compare control 0
Capture/compare control 1
Capture/compare control 2
Capture/compare control 3
Capture/compare control 4
Capture/compare control 5
Capture/compare control 6
TB0 register
TB0CCTL0
TB0CCTL1
TB0CCTL2
TB0CCTL3
TB0CCTL4
TB0CCTL5
TB0CCTL6
TB0R
Capture/compare register 0
Capture/compare register 1
Capture/compare register 2
Capture/compare register 3
Capture/compare register 4
Capture/compare register 5
Capture/compare register 6
TB0 expansion register 0
TB0 interrupt vector
TB0CCR0
TB0CCR1
TB0CCR2
TB0CCR3
TB0CCR4
TB0CCR5
TB0CCR6
TB0EX0
TB0IV
Table 35. TA2 Registers (Base Address: 0400h)
REGISTER DESCRIPTION
REGISTER
TA2CTL
OFFSET
TA2 control
00h
02h
04h
06h
10h
12h
14h
16h
20h
2Eh
Capture/compare control 0
Capture/compare control 1
Capture/compare control 2
TA2 counter register
TA2CCTL0
TA2CCTL1
TA2CCTL2
TA2R
Capture/compare register 0
Capture/compare register 1
Capture/compare register 2
TA2 expansion register 0
TA2 interrupt vector
TA2CCR0
TA2CCR1
TA2CCR2
TA2EX0
TA2IV
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