MSP430F530x, MSP430F5310
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SLAS677B –SEPTEMBER 2010–REVISED MARCH 2011
Table 3. Terminal Functions (continued)
TERMINAL
NO.
I/O
DESCRIPTION
(1)
NAME
RGZ
/PT
RGC
ZQE
General-purpose digital I/O with reconfigurable port mapping secondary
function
Default mapping: Receive data – USCI_A1 UART mode
Default mapping: Slave out, master in – USCI_A1 SPI mode
P4.5/PM_UCA1RXD/
PM_UCA1SOMI
46
34
35
C9
I/O
General-purpose digital I/O with reconfigurable port mapping secondary
I/O function
Default mapping: no secondary function.
P4.6/PM_NONE
47
C8
C7
General-purpose digital I/O with reconfigurable port mapping secondary
I/O function
P4.7/PM_NONE
VSSU
48
49
36
37
Default mapping: no secondary function.
B8,
B9
PU ground supply
PU.0
NC
50
51
52
53
54
55
56
38
39
40
41
42
43
44
A9
B7
A8
A7
A6
B6
A5
I/O General-purpose digital I/O - controlled by PU control register
I/O No connect.
PU.1
LDOI
LDOO
NC
I/O General-purpose digital I/O - controlled by PU control register
LDO input
LDO output
No connect.
AVSS2
Analog ground supply
General-purpose digital I/O
I/O
P5.2/XT2IN
P5.3/XT2OUT
TEST/SBWTCK
PJ.0/TDO
57
58
59
60
61
62
63
45
46
47
23
24
25
26
B5
B4
A4
C5
C4
A3
B3
Input terminal for crystal oscillator XT2
General-purpose digital I/O
I/O
Output terminal of crystal oscillator XT2
Test mode pin – select digital I/O on JTAG pins
Spy-bi-wire input clock
I
General-purpose digital I/O
I/O
Test data output port
General-purpose digital I/O
I/O
PJ.1/TDI/TCLK
PJ.2/TMS
Test data input or test clock input
General-purpose digital I/O
Test mode select
I/O
General-purpose digital I/O
Test clock
PJ.3/TCK
I/O
Reset input active low
I/O Non-maskable interrupt input
Spy-bi-wire data input/output
RST/NMI/SBWTDIO
P6.0/CB0/A0
64
1
48
1
A2
A1
B2
B1
General-purpose digital I/O
I/O Comparator_B input CB0 (not available on '5304 device)
Analog input A0 – ADC
General-purpose digital I/O
I/O Comparator_B input CB1 (not available on '5304 device)
Analog input A1 – ADC
P6.1/CB1/A1
2
2
General-purpose digital I/O
I/O Comparator_B input CB2 (not available on '5304 device)
Analog input A2 – ADC
P6.2/CB2/A2
3
3
General-purpose digital I/O
P6.3/CB3/A3
4
4
C2
I/O Comparator_B input CB3 (not available on '5304 device)
Analog input A3 – ADC
(3)
Reserved
QFN Pad
N/A N/A
QFN package pad. Connection to VSS recommended (not available on PT
package devices)
Pad Pad N/A
(3) C6, D4, D5, D6, E3, E4, E5, E6, F3, F4, F5, F6, F7, F8, G3 are reserved and should be connected to ground.
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