MSP430F530x, MSP430F5310
SLAS677B –SEPTEMBER 2010–REVISED MARCH 2011
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Table 3. Terminal Functions (continued)
TERMINAL
NO.
I/O
DESCRIPTION
(1)
NAME
RGZ
/PT
RGC
28
ZQE
J6
General-purpose digital I/O with port interrupt
TA2 clock signal TA2CLK input ; SMCLK output
P2.2/TA2CLK/SMCLK
P2.3/TA2.0
N/A
N/A
N/A
N/A
I/O
I/O
I/O
I/O
General-purpose digital I/O with port interrupt
TA2 CCR0 capture: CCI0A input, compare: Out0 output
29
H6
J7
General-purpose digital I/O with port interrupt
TA2 CCR1 capture: CCI1A input, compare: Out1 output
P2.4/TA2.1
30
General-purpose digital I/O with port interrupt
TA2 CCR2 capture: CCI2A input, compare: Out2 output
P2.5/TA2.2
31
J8
General-purpose digital I/O with port interrupt
P2.6/RTCCLK/DMAE0
32
33
N/A
N/A
J9
I/O RTC clock output for calibration
DMA external trigger input
General-purpose digital I/O
Slave transmit enable – USCI_B0 SPI mode
Clock signal input – USCI_A0 SPI slave mode
P2.7/UCB0STE/UCA0CLK
H7
I/O
Clock signal output – USCI_A0 SPI master mode
General-purpose digital I/O
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
34
35
N/A
N/A
H8
H9
I/O Slave in, master out – USCI_B0 SPI mode
I2C data – USCI_B0 I2C mode
General-purpose digital I/O
I/O Slave out, master in – USCI_B0 SPI mode
I2C clock – USCI_B0 I2C mode
General-purpose digital I/O
Clock signal input – USCI_B0 SPI slave mode
Clock signal output – USCI_B0 SPI master mode
P3.2/UCB0CLK/UCA0STE
36
N/A
G8
I/O
Slave transmit enable – USCI_A0 SPI mode
General-purpose digital I/O
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
37
38
N/A
N/A
G9
G7
I/O Transmit data – USCI_A0 UART mode
Slave in, master out – USCI_A0 SPI mode
General-purpose digital I/O
I/O Receive data – USCI_A0 UART mode
Slave out, master in – USCI_A0 SPI mode
General-purpose digital I/O with reconfigurable port mapping secondary
function
I/O Default mapping: Slave transmit enable – USCI_B1 SPI mode
Default mapping: Clock signal input – USCI_A1 SPI slave mode
Default mapping: Clock signal output – USCI_A1 SPI master mode
P4.0/PM_UCB1STE/
PM_UCA1CLK
41
29
E8
General-purpose digital I/O with reconfigurable port mapping secondary
P4.1/PM_UCB1SIMO/
PM_UCB1SDA
function
42
43
30
31
E7
D9
I/O
Default mapping: Slave in, master out – USCI_B1 SPI mode
Default mapping: I2C data – USCI_B1 I2C mode
General-purpose digital I/O with reconfigurable port mapping secondary
function
Default mapping: Slave out, master in – USCI_B1 SPI mode
P4.2/PM_UCB1SOMI/
PM_UCB1SCL
I/O
Default mapping: I2C clock – USCI_B1 I2C mode
General-purpose digital I/O with reconfigurable port mapping secondary
function
I/O Default mapping: Clock signal input – USCI_B1 SPI slave mode
Default mapping: Clock signal output – USCI_B1 SPI master mode
Default mapping: Slave transmit enable – USCI_A1 SPI mode
P4.3/PM_UCB1CLK/
PM_UCA1STE
44
32
D8
DVSS2
DVCC2
39
40
27
28
F9
E9
Digital ground supply
Digital power supply
General-purpose digital I/O with reconfigurable port mapping secondary
P4.4/PM_UCA1TXD/
PM_UCA1SIMO
function
45
33
D7
I/O
Default mapping: Transmit data – USCI_A1 UART mode
Default mapping: Slave in, master out – USCI_A1 SPI mode
10
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