MSP430G2x53
MSP430G2x13
www.ti.com
SLAS735A –APRIL 2011–REVISED MAY 2011
Port P1 Pin Schematic: P1.3, Input/Output With Schmitt Trigger
SREF2 *
VSS
0
1
To ADC10 VREF- *
To Comparator
from Comparator
To ADC10 *
INCHx = y *
CAPD.y
or ADC10AE0.y *
PxSEL2.y PxSEL.y
PxDIR.y
0,2,3
1
Direction
0: Input
1: Output
PxSEL2.y
PxSEL.y
PxREN.y
0
1
1
0
1
PxSEL2.y
PxSEL.y
DVSS
DVCC
0
1
1
PxOUT.y
0
1
From ADC10 *
2
3
Bus
Keeper
EN
P1.3/ADC10CLK*/CAOUT/
A3*/VREF-*/VEREF-*/CA3
From Comparator
TAx.y
TAxCLK
PxIN.y
EN
D
To Module
PxIRQ.y
PxIE.y
EN
Set
Q
PxIFG.y
PxSEL.y
PxIES.y
Interrupt
Edge
Select
* Note: MSP430G2x53 devices only. MSP430G2x13 devices have no ADC10.
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
43