MSP430G2x53
MSP430G2x13
www.ti.com
SLAS735A –APRIL 2011–REVISED MAY 2011
Port P1 Pin Schematic: P1.5 to P1.7, Input/Output With Schmitt Trigger
To Comparator
From Comparator
To ADC10 *
INCHx = y *
CAPD.y
ADC10AE0.y *
PxSEL2.y
PxSEL.y
PxDIR.y
0
1
From Module
Direction
0: Input
1: Output
2
3
From Module
PxSEL2.y
PxSEL.y
PxREN.y
0
1
1
0
1
PxSEL2.y
PxSEL.y
DVSS
DVCC
0
1
1
PxOUT.y
0
1
From Module
2
3
Bus
Keeper
EN
From Module
P1.5/TA0.0/UCB0CLK/UCA0STE/
A5*/CA5/TMS
P1.6/TA0.1/UCB0SOMI/UCB0SCL/
A6*/CA6/TDI/TCLK
P1.7/CAOUT/UCB0SIMO/UCB0SDA/
A7*/CA7/TDO/TDI
TAx.y
TAxCLK
PxIN.y
EN
D
To Module
PxIRQ.y
PxIE.y
EN
Set
Q
PxIFG.y
PxSEL.y
PxIES.y
Interrupt
Edge
Select
From JTAG
To JTAG
* Note: MSP430G2x53 devices only. MSP430G2x13 devices have no ADC10.
Copyright © 2011, Texas Instruments Incorporated
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