MSP430FR573x
MSP430FR572x
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SLAS639D –JULY 2011–REVISED AUGUST 2012
Port J, J.0 to J.3 JTAG pins TDO, TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or
Output
To Comparator
From Comparator
CDPD.x
From JTAG
From JTAG
From JTAG
Pad Logic
1
0
PJREN.x
PJDIR.x
0 0
0 1
1 0
1 1
1
0
DVSS
DVCC
0
1
Direction
0: Input
1: Output
1
JTAG enable
0 0
0 1
1 0
1 1
PJOUT.x
From module 1
DVSS
1
0
PJ.0/TDO/TB0OUTH/SMCLK/CD6
PJ.1/TDI/TCLK/TB1OUTH/MCLK/CD7
PJ.2/TMS/TB2OUTH/ACLK/CD8
DVSS
PJSEL0.x
PJSEL1.x
PJIN.x
Bus
Keeper
EN
D
To modules
and JTAG
To Comparator
From Comparator
CDPD.x
Pad Logic
From JTAG
From JTAG
From JTAG
1
0
PJREN.x
PJDIR.x
0 0
0 1
1 0
1 1
1
0
DVSS
DVCC
0
1
Direction
0: Input
1: Output
1
JTAG enable
0 0
0 1
1 0
1 1
PJOUT.x
DVSS
1
0
DVSS
DVSS
PJ.3/TCK/CD9
PJSEL0.x
PJSEL1.x
PJIN.x
Bus
Keeper
EN
D
To modules
and JTAG
Copyright © 2011–2012, Texas Instruments Incorporated
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