MSP430FR573x
MSP430FR572x
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SLAS639D –JULY 2011–REVISED AUGUST 2012
Port P3, P3.4 to P3.6, Input/Output With Schmitt Trigger
Pad Logic
DVSS
P3REN.x
0 0
0 1
1 0
1 1
P3DIR.x
DVSS
DVCC
0
1
Direction
0: Input
1: Output
1
0 0
0 1
1 0
1 1
P3OUT.x
From module 1
DVSS
P3.4/TB1.1/TB2CLK/SMCLK
P3.5/TB1.2/CDOUT
P3.6/TB2.1/TB1CLK
From module 2
P3SEL0.x
P3SEL1.x
P3IN.x
Bus
Keeper
EN
D
To modules
Table 51. Port P3 (P3.4 to P3.6) Pin Functions
CONTROL BITS/SIGNALS
PIN NAME (P3.x)
x
FUNCTION
P3DIR.x P3SEL1.x P3SEL0.x
(1)
P3.4/TB1.1/TB2CLK/SMCLK
4
P3.4 (I/O)
I: 0; O: 1
0
0
(1)
TB1.CCI1B
0
0
1
(1)
TB1.1
1
(1)
TB2CLK
0
1
0
0
1
0
1
(1)
SMCLK
1
(1)
P3.5/TB1.2/CDOUT
P3.6/TB2.1/TB1CLK
5
6
P3.5 (I/O)
I: 0; O: 1
(1)
TB1.CCI2B
0
(1)
TB1.2
1
(1)
CDOUT
1
1
0
1
0
(1)
P3.6 (I/O)
I: 0; O: 1
(1)
TB2.CCI1B
0
1
0
0
1
1
1
(1)
TB2.1
(1)
TB1CLK
(1) Not available on all devices and package types.
Copyright © 2011–2012, Texas Instruments Incorporated
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